Panasonic WR-201E Design Handbook page 39

BLOCK DIAGRAMS
5
WA-BA240N
76
WU-ZM001E
Sirial IO
I/F between
the Amplifier
5
Digital Tr
Parallel IO
Digital Tr
4
CODEC
Rec
Input
MUTE
( Tr )
Phones
Output
Announce
Message
Output
EMG
Message
Output
EMG
DC24V
Main Board
WU-ZS001E
OT
Audio announcement
PA
PA
Pilot Signal
WA-MA120N or WA-MA240N
Mixing Power Amplifier
DC24V Power
DC/DC
AMP
Speaker line
Pilot Signal
WU-ZS001E
Surveillance Unit
LPF
BLOCK DIAGRAMS
WU-ZM001E/WU-ZS001E
Local BUS
Flash MEM
FPGA
SDRAM
BATT RTC
P/S
SERIAL IN
S/P
SERIAL OUT DIP
SERIAL CLK SW
MCK,BCK,WCK
LED
SDT O SDT I
LCD I/F GIPO
MPX BUS
PARALLEL I/O
27MHz
PLL
VCXO
I2C
SPI
USB I/F
SD I/F
UART1
UART2
CORE Board
P/S
P_FAIL
SENSE
3.3Vto5V
IF Switch
SD
12 Reg
5V Reg
3.3V Reg
REC IN PHONES
5V Reg
Panel Board
Zone1
Zone2
Zone3
Internal control
OPEN
Reset IC
Serial
Pallarel
CPU
ADC0
LPF
D-Tr
LPF ADC1
ADC2
LPF
LPF ADC3
IOport
LPF
IOport
IOport
E2PROM
DIP SW
Reference Data
5
CPU
_~10 _~1
S/P
_~16
OUTPUT
Check SW
SURVEILLANCE I/F
(D-sub25p)
Status
ZONE1
ZONE2
ZONE3
ZONE4
ZONE5
Grand Fault
77