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Delete..(F4, 9/26)
AUDIO_I2C_SCL
AUDIO_I2C_SDA
VREG_MSME_1.8V
CAM_I2C_SCL
CAM_I2C_SDA
VREG_MSME_1.8V
MINI_I2C_SCL
MINI_I2C_SDA
LGE Internal Use Only
Deleted JTAG at 1.0
AC3
HOOK_DETECT
GPIO_77
LCD_ID
AB1
GPIO_76
AB2
HOST_WAKES_BT
GPIO_75
AA3
BT_WAKES_HOST
GPIO_74
AB8
GPIO_73
AA7
GPIO_72
V8
GPIO_71
W9
GPS_LNA_EN
GPIO_70
W8
GPIO_69
W7
GPIO_68
W6
GPIO_67
V7
HS_SENSE
GPIO_66
T14
HSMIC_BIAS_EN
GPIO_65
C17
PA_R0
GPIO_64
C16
PA_R1
GPIO_63
A16
ANT_SEL[0]
GPIO_62
B16
ANT_SEL[1]
GPIO_61
A17
ANT_SEL[2]
GPIO_60
B17
GPIO_59
E15
GPS_ADC_Q
GPIO_58
B15
GPS_ADC_CLK_XO
GPIO_57
A14
GPS_SSBI
GPIO_56
F14
GPS_ADC_I
GPIO_55
A13
GPIO_54
E8
GPIO_53
F8
GPIO_52
LCD_RESET_N
F7
GPIO_51
E7
GPIO_50
A7
GPIO_49
B7
NAND_READY
GPIO_48
AC5
USIM_DATA
GPIO_47
AB6
USIM_CLK
GPIO_46
AC4
USIM_RESET_N
GPIO_45
H10
MINI_INT
GPIO_44
C9
GPIO_43
B9
KEY_IN_VDN
GPIO_42
H12
KEY_IN_VUP
GPIO_41
B10
GPIO_40
A10
GPIO_39
CAMIF_MCLK
A11
GPIO_38
CAMIF_DATA[7]
C14
GPIO_37
CAMIF_DATA[6]
B14
GPIO_36
CAMIF_DATA[5]
F13
GPIO_35
CAMIF_DATA[4]
B13
GPIO_34
C13
CAMIF_DATA[3]
GPIO_33
F12
CAMIF_DATA[2]
GPIO_32
B12
CAMIF_DATA[1]
GPIO_31
C12
CAMIF_DATA[0]
GPIO_30
E13
CAM_PWDN
GPIO_29
B11
GPIO_28
E12
CAM_RESET_N
GPIO_27
E11
CAMIF_VSYNC
GPIO_26
C11
GPIO_25
CAMIF_HSYNC
E14
GPIO_24
CAMIF_PCLK
G6
LCD_VSYNC
GPIO_23
C8
BT_PCM_CLK
GPIO_22
E9
BT_PCM_DOUT
GPIO_21
B8
BT_PCM_DIN
GPIO_20
A8
BT_PCM_SYNC
GPIO_19
W1
QKEY_RESET
GPIO_18
V1
QKEY_I2C_SCL
GPIO_17
V2
QKEY_I2C_SDA
GPIO_16
W2
QKEY_INT
GPIO_15
W3
GPIO_14
Y1
GPIO_13
Y2
GPIO_12
AA1
GPIO_11
Y3
GPIO_10
AA2
BT_RESET_N
GPIO_9
F11
UART1_RFR_N
GPIO_8
F10
UART1_CTS_N
GPIO_7
AB4
MICROSD_CLK
GPIO_6
AA6
MICROSD_DATA[3]
GPIO_5
AB5
MICROSD_DATA[2]
GPIO_4
AA5
MICROSD_DATA[1]
GPIO_3
AA4
MICROSD_DATA[0]
GPIO_2
AB3
MICROSD_CMD
GPIO_1
C15
MICROSD_DETECT
GPIO_0
GND_RF_TX_PLL
GND_RF_TX_DIG
GND_RF_RX_OSC
FROM F4_revB
VREG_RFA_2.2V
R200
100K
C204
R201
C200
2p
39p
91K
C201
C205
0.1u
39p
K6
EBI1_A_D_31
M6
EBI1_A_D_30
M5
EBI1_A_D_29
N5
EBI1_A_D_28
K3
EBI1_A_D_27
M3
EBI1_A_D_26
L6
EBI1_A_D_25
H3
EBI1_A_D_24
N6
EBI1_A_D_23
R5
EBI1_A_D_22
P6
EBI1_A_D_21
T5
EBI1_A_D_20
P3
EBI1_A_D_19
T6
EBI1_A_D_18
T3
EBI1_A_D_17
U3
EBI1_A_D_16
G2
EBI1_A_D_15
G1
EBI1_A_D_14
H1
EBI1_A_D_13
H2
EBI1_A_D_12
K1
EBI1_A_D_11
K2
EBI1_A_D_10
L1
EBI1_A_D_9
L2
EBI1_A_D_8
M1
EBI1_A_D_7
M2
EBI1_A_D_6
N1
EBI1_A_D_5
N2
EBI1_A_D_4
R1
EBI1_A_D_3
R2
EBI1_A_D_2
T1
EBI1_A_D_1
T2
EBI1_A_D_0
U200
A5
EBI2_A_D_15
B5
EBI2_A_D_14
C5
EBI2_A_D_13
A4
EBI2_A_D_12
C4
EBI2_A_D_11
A3
EBI2_A_D_10
B4
EBI2_A_D_9
D3
EBI2_A_D_8
E3
EBI2_A_D_7
B3
EBI2_A_D_6
C2
EBI2_A_D_5
B1
EBI2_A_D_4
C1
EBI2_A_D_3
D2
EBI2_A_D_2
D1
EBI2_A_D_1
E1
EBI2_A_D_0
P1
EBI1_DQS_0
J1
EBI1_DQS_1
P2
EBI1_DQM_0
J2
EIB1_DQM_1
F3
EBI1_CKE_0
P5
EBI1_CKE_1
H6
EBI1_CS0_N
J5
EBI1_CS1_N
J6
EBI1_ADV_N
G5
EBI1_OE_N
H5
EBI1_WE_N
K5
R213
18
EBI1_M_CLK
L5
R214
18
EBI1_M_CLK_N
B6
LCD_RS
F5
LCD_EN
C7
LCD_CS_N
E6
EBI2_WE_N
F2
EBI2_OE_N
F1
EBI2_UB_N
C6
EBI2_LB_N
E5
EBI2_CS1_N
E2
EBI2_CS0_N
A2
EBI2_M_CLK
GND_CDC2
GND_RF_RX_PLL
- 133 -
MODE
ADC
HKAIN1:PCB_Rev_ADC
MODE_3 MODE_2 MODE_1 MODE_0
( Default Pull-Down)
100K : 6.2K : 0.128V - A, F
HKAIN0 - VBATT_TEMP
0
0
0
1
Native ARM9 JTAG
100K : 13K : 0.253V - B, G
HKAIN1 - PCB_Rev_ADC
* MODE_3 : Not connected(internally pulled-up) - Enabled by HW
MPP1 - VREF_RFA_2.2V (internally)
100K : 22K : 0.396V - C, H
MPP2 - Null
100K : 47K : 0.703V - D, I
MPP3 - KYBD_BACKLIGHT
100K : 62K : 0.842V - E, J
MPP4 - Null
LCD_DRV_N - SUB_BACKLIGHT
100K : 91K : 1.048V - 1.0
100K : 150K : 1.32V - 1.1
100K : 240K : 1.553V - 1.2
100K : 470K : 1.814V - 1.3
100K : 1.5M : 2.062V - 1.4
ADC
HKAIN0 - VBATT_TEMP
HKAIN1 - PCB_Rev_ADC
MPP1 - VREF_RFA_2.2V (internally)
MPP2 - UART_BT_SEL
MPP3 - KYBD_BACKLIGHT
MPP4 - USB_ADC
LCD_DRV_N - NC
SDRAM_ADDR[15]
SDRAM_ADDR[14]
SDRAM_ADDR[13]
SDRAM_ADDR[12]
SDRAM_ADDR[11]
SDRAM_ADDR[10]
SDRAM_ADDR[9]
SDRAM_ADDR[8]
SDRAM_ADDR[7]
SDRAM_ADDR[6]
SDRAM_ADDR[5]
SDRAM_ADDR[4]
SDRAM_ADDR[3]
SDRAM_ADDR[2]
SDRAM_ADDR[1]
SDRAM_ADDR[0]
SDRAM_DATA[15]
SDRAM_DATA[14]
SDRAM_DATA[13]
SDRAM_DATA[12]
SDRAM_DATA[11]
SDRAM_DATA[10]
SDRAM_DATA[9]
SDRAM_DATA[8]
SDRAM_DATA[7]
SDRAM_DATA[6]
SDRAM_DATA[5]
SDRAM_DATA[4]
SDRAM_DATA[3]
SDRAM_DATA[2]
SDRAM_DATA[1]
SDRAM_DATA[0]
EBI2_DATA[15]
EBI2_DATA[14]
EBI2_DATA[13]
EBI2_DATA[12]
EBI2_DATA[11]
EBI2_DATA[10]
EBI2_DATA[9]
EBI2_DATA[8]
EBI2_DATA[7]
EBI2_DATA[6]
EBI2_DATA[5]
EBI2_DATA[4]
EBI2_DATA[3]
EBI2_DATA[2]
EBI2_DATA[1]
EBI2_DATA[0]
SDRAM_DQS[0]
SDRAM_DQS[1]
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_CKE[0]
SDRAM_CS_N[0]
SDRAM_ADV_N
SDRAM_OE_N
SDRAM_WE_N
SDRAM_CLK_P
SDRAM_CLK_N
LCD_RS
LCD_CS_N
EBI2_WE_N
EBI2_OE_N
NAND_UB_N
NAND_LB_N
NAND_CS_N
Copyright © 2012 LG Electronics. Inc. All right reserved.
7. CIRCUIT DIAGRAM
Only for training and service purposes
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