Schematic Diagram - Main Board (4/8) - Sony NW-A1000 Service Manual

5-9. SCHEMATIC DIAGRAM – MAIN Board (4/8) –
DEN_BCK0
XINT_DEN
DEN_PCMD0
DEN_DATA_RDY
DEN_SCS0
DEN_LRCK0
FRES_RXW
FRES_A3
FRES_A2
FRES_XOE
FRES_A1
FRES_XCS1
FS256
FRES_A<23:1>
(Page 26)
SCLK3
DENDE_SS
DATA_READY
SDATAI3
LRCK3
XINT_DENDE
FRES_D27
FRES_D26
FRES_D25
FRES_D24
GND
3.0V
1.8V
(Page 32)
FRES_D<31:16>
(Page 26)
NW-A1000
• See page 36 for IC Pin Function Description.
(4/8)
C8018
0.1
R8018 22k
R8019 22k
R8020 22k
R8021 22k TP8005
DEN_SCS0
R8022 22k
DEN_LRCK0
R8023 22k
GNDIO1
C8010 0.1
VCCIO1
FRES_RXW
CL8110
IIS_CLR_N
CL8111
FRES_A3
CL8112
FRES_A2
FRES_XOE
CL8114
FRES_A1
CL8115
FRES_XCS1
FS256
VCC
R8038
C8025 NC
0
47p
SCLK3
DENDE_SS
CL8121
DATA_READY
R8039 0
SDATAI3
C8026 47p R8040 10
LRCK3
C8027 47p
XINT_DENDE
VCCIO0
C8011 0.1
GNDIO0
FRES_D27
CL8128
R8024
NC
10k
CL8130
R8025
10k
R8026 10k
R8027
10k
R8003 0
R8001 0
R8017
22k
C8024
47p
R8016 C8023 C8022 R8011
22k 47p 47p 100k
C8009
0.1
C8008
0.1
R8035
10
R8036
10
100 GND
101 DEN_BCK0 69 68 67
102 XINT_DEN
PLD_BEEP
103 DEN_PCMD0
DEN_SCK0
104 DEN_DATA_RDY
SPI_CS0
XCHG_STAT2
PLD
IC8001
LC4128ZC
-75MN132C-U5
*
CSP(Chip Size Package)
129 FRES_D26
XHDD_PWR_CTL
130 NC
KEY_LED2
131 FRES_D25
GND
132 FRES_D24
1 2 3 4 31 32 33
29 29
R8005
10k
C8007
0.1
R8012
10k
PLD_BEEP
CL8065 DEN_SCKO
CL8064 SPI_CS0
XCHG_STAT2
R8013 10k
GPIO5
CHG_STAT1
XCHG_STAT1
GNDIO1
R8008
C8006 0.1
470k
66 VCCIO1
JACK_DET
65 JACK_DET
CL8057 SPI_CS1
64 SPI_CS1
SUSPEND
63 SUSPEND
CL8055 SPI_CS2
SPI_CS2
AF_DCIN_DET
AF_DCIN_DET
DC_OUT_CTL
DC_OUT_CTL
NC C8017
0.1
VCC
R8014 10k
NC
R8015 10k
ICD_SO
CL8048
D33_MODE
KEY_LED1
KEY_LED1
XGSEN_PWR_CTL
XGSEN_PWR_CTL
HP_LINE_SEL
36 HP_LINE_SEL
CL8044
35 RESET_TSB
HP_CRD_SEL
34 CRD_MUTE1
VCCIO0
C8005 0.1
GNDIO0
EL_PWR
EL_PWR
CL8039
IIS_CLR
HP_MUTE
HP_MUTE
XUSLEEP
XUSLEEP
XHDD_PWR_CTL
KEY_LED2
C8004 C8003
0.1 0.1
NW-A1000
AF_DCIN_DET
AF_DCIN_DET
(Page 26)
PWR_FFCLR
PWR_FFCLR
SCLK1
SCLK1
LRCK1
LRCK1
MULTI_SI
MULTI_SI
MULTI_SCK
MULTI_SCK
SDATAO1
SDATAO1
MULTI_SO
MULTI_SO
XINT_DENDE
XINT_DENDE
DATA_READY
DATA_READY
LRCK3
LRCK3
SCLK3
SCLK3
SDATAI3
SDATAI3
WAKEUP_DENDE
WAKEUP_DENDE
DENDE_SREQ
DENDE_SREQ
TSB_RW
TSB_RW
FS256
FS256
DENDE_SS
(Page 26)
DENDE_SS
SCLK2
SCLK2
AF_XRST
AF_XRST
FRES_RXW
FRES_RXW
FRES_XOE
FRES_XOE
FRES_XCS1
FRES_XCS1
SPI_CS0
SPI_CS0
SPI_CS1
SPI_CS1
SPI_CS2
SPI_CS2
EX_MULTI_SCK
EX_MULTI_SCK
EX_MULTI_SO
EX_MULTI_SO
KEY_LED2
KEY_LED2
KEY_LED1
KEY_LED1
LCD_XCS
LCD_XCS
EL_PWR
EL_PWR
(Page 28)
ADP_DET
ADP_DET
CRADLE_SCK
CRADLE_SCK
CRADLE_SI
CRADLE_SI
CRADLE_SO
CRADLE_SO
CRADLE_CS
CRADLE_CS
JACK_DET
JACK_DET
(Page 33)
XGSEN_PWR_CTL
XGSEN_PWR_CTL
XINT_DEN
XINT_DEN
DEN_DATA_RDY
DEN_DATA_RDY
DEN_SO0
DEN_SO0
DEN_LRCK0
DEN_LRCK0
DEN_BCK0
DEN_BCK0
DEN_PCMD0
DEN_PCMD0
DEN_XRDE
DEN_XRDE
DEN_SCS0
(Page 30)
DEN_SCS0
XRESET_DEN
XRESET_DEN
RTC_CE
RTC_CE
EX_MULTI_SCK
EX_MULTI_SCK
DENDE_IN
TSB
TSB
HP_MUTE
HP_MUTE
HP_CRD_SEL
HP_CRD_SEL
HP_LINE_SEL
HP_LINE_SEL
PLD_BEEP
PLD_BEEP
DAC_XCS
DAC_XCS
(Page 31)
EX_MULTI_SO
EX_MULTI_SO
EX_MULTI_SCK
EX_MULTI_SCK
DC_OUT_CTL
DC_OUT_CTL
SUSPEND
SUSPEND
PWR_SLEEP
PWR_SLEEP
PWR_FFCLR
PWR_FFCLR
BAT_MON_CTL
BAT_MON_CTL
XVBUS_LIM
XVBUS_LIM
XCHG_STAT2
XCHG_STAT2
(Page 32)
CHG_STAT1
CHG_STAT1
PWR_STRB
PWR_STRB
EX_MULTI_SO
EX_MULTI_SO
EX_MULTI_SCK
EX_MULTI_SCK
XHDD_PWR_CTL
XHDD_PWR_CTL
XUSLEEP
XUSLEEP
(Page 33)