Sony RCD-W500C Service Manual page 88

RCD-W500C
• IC201 LC89587-UK1-E CD DEC/ENC (CDR Board)
Pin No. Pin Name
1 DVSS
2 to 6 RA4 to RA8
7 RA9
8 DVDD
9 DVSS
10 to 15 IO0 to IO5
16 DVDD
17 DVSS
18 to 21 IO6 to IO9
22 DVDD
23 DVSS
24 to 29 IO10 to IO15
30 MON1
31 MON2
32 MON3
33 MON4
34 DVDD
35 DVSS
36 TEST0
37 TEST1
38 TEST2
39 WRITE
40 SSP2
41 SSP1
42 RAPC/C2F
43 WAPC
44 H11TO/FSEQ
45 LDH/WRQ
46 ATEST3
47 ATEST1
48 WDAT
49 NWDAT
50 DVDD
51 DVSS
52 AVDD
53 AVSS
54 R1
55 VCNT1
56 DCN1
57 PD1
58 ZINT
59 to 66 D0 to D7
67 SRSTNBY
68 AVDD
69 AVSS
70 to 77 SUA0 to SUA7
78 ZRD
79 ZCS
80 ZWR
81 ZRESET
88
I/O
— Ground terminal (digital)
O Address signal output to the buffer RAM for audio data delay
O Address signal output to the buffer RAM for audio data delay Not used (open)
— Power supply +3.3V (DRAM I/F)
— Ground terminal (digital)
I/O Data input/output to the buffer RAM for audio data delay
— Power supply +3.3V (digital)
— Ground terminal (digital)
I/O Data input/outputto the buffer RAM for audio data delay
— Power supply +3.3V (DRAM I/F)
— Ground terminal (digital)
I/O Data input/output to the buffer RAM for audio data delay
O Monitor output EFMG signal
O Monitor output ATIPCRC/PCK/DATA signal (open)
O Monitor output CDETR/CK2 signal (open)
O Monitor output EMP/LRCK signal (open)
— Power supply +5V (digital)
— Ground terminal (digital)
I/O ENCERR signal output (pull-up)
I/O TESTOUT signal output (pull-up)
I/O TESTIN signal input (ground)
I Write strategy signal control terminal
O Servo sampling pulse output
O Servo sampling pulse output
O Laser sampling pulse output
O Laser sampling pulse output
O Running OPC sampling pulse output
O LD control signal output for recording Not used (open)
O Analog block test signal output (WE2)
O Analog block test signal output Not used (open)
O LD control signal output for recording
O LD control signal output for recording
— Power supply +5V (digital)
— Ground terminal (digital)
— Power supply 3.3V (analog) for the write strategy
— Ground terminal (analog)
I Analog terminal for the write strategy (fixed at "H")
I Analog terminal for the write strategy
I Analog terminal for the write strategy Not used (open)
O Analog terminal for the write strategy
Interrupt request signal output to the µcom (IC501)
O
Data input/output with the µcom (IC501)
I/O
I Back up control terminal for CD-TEXT SRAM
— Power supply +3.3V (analog) for CD-TEXT SRAM
— Ground terminal (analog)
I Command register selection address signal input
Data read out signal input from the µcom (IC501)
I
Chip select signal input from the µcom (IC501)
I
Data write signal input from the µcom (IC501)
I
I Reset signal input
Description