Philips FW-V28 Service Manual page 74

ES3883 VIDEO CD COMPANION CHIP
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
DSC_D7 81
HSYN_B
82
DSC_D6 83
VSYN_B 84
DSC_D5 85
YUV7 86
Visba ES3883
YUV6
87
YUV5
88
YUV4 89
Video CD
VCC 90
VSS 91
YUV3 92
Companion Chip
DSC_D4 93
YUV2 94
DSC_D3 95
YUV1 96
DSC_D2 97
YUV0 98
DSC_D1 99
VSS 100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
PIN DESCRIPTION
Name Number I/O Definition
VSS 1,25:26,31,72,75,77,91,100 I Ground.
VCC 5,16,32,66,73,78,90 I Voltage supply, 5 V.
DSC_C 6 I Clock for programming to access internal registers.
AUX0 7 I/O Servo Forward or Control Pin.
AUX1 9 I/O Servo Reverse or Control Pin.
AUX2 11 I/O Servo LDON or Control Pin.
AUX3 70 I/O Servo CW/Limit or Control Pin.
AUX4 69 I/O Servo CCW/Close or Control Pin.
AUX5 68 I/O Servo Data or Control Pin.
AUX6 67 I/O Servo XLAT or Control Pin/VFD_DO.
AUX7 14 I/O Servo BRKM/Sense or Control Pin/VFD_DI.
AUX8 18 I/O Servo Mute/Open or Control Pin/VFD_CLK.
AUX9 20 I/O Servo SQS0 or Control Pin.
AUX10 34 I/O Servo SQCK or Control Pin.
AUX11 35 I/O 3880 IRQ or Interrupt Output or Control Pin.
AUX12 36 I/O CD C2PO or Interrupt Input or Control Pin.
AUX13 38 I/O Serial Interrupt/CD-Mute or Control Pin.
AUX14 39 I/O Servo SCOR (S0S1) or Interrupt Input or Control Pin.
AUX15 40 I/O Interrupt Input or Control Pin.
DSC_D[7:0] 81,83,85,93,95,97,99,8 I/O Data for programming to access internal registers.
DSC_S 10 I Strobe for programming to access internal registers.
DCLK O Dual-purpose pin DCLK is the MPEG decoder clock.
12
EXT_CLK I EXT_CLK is the external clock EXT_CLK is an input during bypass PLL mode.
RESET_B 13 I Video reset (active-low).
MUTE 15 O Audio mute.
MCLK 17 I Audio master clock.
TWS I Dual-purpose pin TWS is the transmit audio frame sync.
19
SPLL_OUT O SPLL_OUT is the select PLL output.
12-3
51
50 MIC2
MIC1
49
AOL+
48
AOL-
47
AOR-
46
AOR+
45
VCCAA
44
VREFP
43
42 VCM
41 VSSAA
40 AUX15/IR
39 AUX14/SOS1
AUX13/SP
38
RBCK/SER_IN
37
36 AUX12/C2PO
35 AUX11/IRQ
34 AUX10/SQCK
33 RSD/SEL_PLL0
32 VCC
31 VSS
30
Name Number I/O Definition
TSD 21 I Transmit audio data input.
TBCK 22 I Transmit audio bit clock.
RWS O Dual-purpose pin RWS is the receive audio frame sync.
SEL_PLL1 I Pins SEL_PLL[1:0] select the PLL clock frequency for the DCLK output.
SEL_PLL1
0
23
0
1
1
RSTOUT_B 24 O Reset output (active-low).
NC 2:4,27:30,76 No connect. Do not connect to these pins.
RSD O Dual-purpose pin. RSD is the receive audio data input.
33 I SEL_PLL0 along with SEL_PLL1 select the PLL clock frequency for the DCLK output. See the
SEL_PLL0
table for pin number 23.
RBCK O Dual-purpose pin. RBCK is the receive audio bit clock.
I SER_IN is the serial input DSC mode.
37
SER_IN 0 - Parallel DSC mode.
1 - Serial DSC mode.
VSSAA 41,51 I Audio Analog Ground.
VCM I ADC Common Mode Reference (CMR) buffer output. CMR is approximately 2.25 V. Bypass to
42
analog ground with 47 m F electrolytic in parallel with 0.1 m F.
VREFP 43 I DAC and ADC maximum reference. Bypass to VCMR with 10 m F in parallel with 0.1 m F.
VCCAA 44 I Analog VCC, 5 V.
AOR+, AOR- 45:46 O Right channel output.
AOL-, AOL+ 47:48 O Left channel output.
MIC1 49 I Microphone input 1.
MIC2 50 I Microphone input 2.
VREF I Internal resistor divider generates Common Mode Reference (CMR) voltage. Bypass to ana-
52
log ground with 0.1 m F.
VREFM 53 I DAC and ADC minimum reference. Bypass to VCMR with 10 m F in parallel with 0.1 m F.
RSET 54 I Full scale DAC current adjustment.
COMP 55 I Compensation pin.
VSSAV 56:57,62:63 I Video Analog Ground
CDAC 58 O Modulated chrominance output.
VCCAV 59,60 I Video VCC, 5 V
YDAC 61 O Y luminance data bus for screen video port.
VDAC 64 O Composite video output.
ACAP 65 I Audio CAP
XOUT 71 O Crystal output.
XIN 74 I 27 MHz crystal input.
PCLK 79 I/O 13.5 MHz pixel clock.
2XPCLK 80 I/O 27 MHz (2 times pixel clock).
HSYN_B 82 O Horizontal sync (active-low).
VSYN_B 84 O Vertical sync (active-low).
YUV[7:0] 86:89,92,94,96,98 I YUV data bus for screen video port.
12-3
SEL_PLL0 DCLK
0 Bypass PLL (input mode)
1 27 MHz (output mode)
0 32.4 MHz (output mode)
1 40.5 MHz (output mode)
PCS 102 791