National Semiconductor HPC167064 Specification Sheet

High-performance microcontroller with a 16k uv erasable cmos eprom

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HPC167064 HPC467064 High-Performance
microController with a 16k UV Erasable CMOS EPROM

General Description

The HPC167064 is a member of the HPC family of High
Performance microControllers Each member of the family
has the same core CPU with a unique memory and I O
configuration to suit specific applications The HPC167064
has a 16 kbyte high-speed UV-erasable electrically pro-
grammable CMOS EPROM This is ideally suited for appli-
cations where fast turnaround pattern experimentation and
code confidentiality are important requirements
HPC167064 can serve as a stand-alone emulator for either
the HPC16064 or the HPC16083 Two configuration regis-
ters have been added for emulation of the different chips
The on-chip EPROM replaces the presently available user
ROM space The on-chip EPROM can be programmed via a
DATA I O UNISITE There are security features added to
the chip to implement READ ENCRYPTED READ and
WRITE privileges for the on-chip EPROM These defined
privileges are intended to deter theft alteration or uninten-
tional destruction of user code Each part is fabricated in
National's advanced microCMOS technology This process
combined with an advanced architecture provides fast flex-
ible I O control efficient data manipulation and high speed
computation
The HPC devices are complete microcomputers on a single
chip All system timing internal logic EPROM RAM and
I O are provided on the chip to produce a cost effective
solution for high performance applications On-chip func-
tions such as UART up to eight 16-bit timers with 4 input
capture registers vectored interrupts WATCHDOG
and MICROWIRE PLUS
TM
provide a high level of system
integration The ability to address up to 64k bytes of exter-
nal memory enables the HPC to be used in powerful appli-
cations typically performed by microprocessors and expen-
sive peripheral chips
The microCMOS process results in very low current drain
and enables the user to select the optimum speed power
product for his system The IDLE and HALT modes provide
Block Diagram
(HPC167064 with 16k EPROM shown)
Series 32000 and TRI-STATE are registered trademarks of National Semiconductor Corporation
MICROWIRE PLUS
TM
and WATCHDOG
TM
are trademarks of National Semiconductor Corporation
UNIX is a registered trademark of AT
T Bell Laboratories
IBM and PC-AT are registered trademarks of International Business Machines Corp
SunOS
TM
is a trademark of Sun Microsystems
C 1995 National Semiconductor Corporation
The
logic
TM
TL DD11046
further current savings The HPC167064 is available only in
68-pin LDCC package
Features
HPC family core features
Y
16-bit architecture both byte and word operations
16-bit data bus ALU and registers
64 kbytes of direct memory addressing
FAST 200 ns for fastest instruction when using
20 0 MHz clock 134 ns at 30 0 MHz
High code efficiency most instructions are single
byte
16 x 16 multiply and 32 x 16 divide
Eight vectored interrupt sources
Four 16-bit timer counters with 4 synchronous out-
puts and WATCHDOG logic
MICROWIRE PLUS serial I O interface
CMOS very low power with two power save modes
IDLE and HALT
16 kbytes high speed UV erasable electrically program-
Y
mable CMOS EPROM
Stand-alone emulation of HPC16083 and HPC16064
Y
family
EPROM and configuration bytes programmable by
Y
DATA I O UNISITE with Pinsite Module
Four selectable levels of security to protect on-chip
Y
EPROM contents
UART full duplex programmable baud rate
Y
Four additional 16-bit timer counters with pulse width
Y
modulated outputs
Four input capture registers
Y
52 general purpose I O lines (memory mapped)
Y
Commercial (0 C to
70 C) and military (
Y
a
125 C) temperature ranges for 20 0 MHz commercial
a
(0 C to
70 C) for 30 0 MHz
a
TL DD 11046– 1
PRELIMINARY
August 1992
55 C to
b
RRD-B30M105 Printed in U S A

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Table of Contents
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Summary of Contents for National Semiconductor HPC167064

  • Page 1: General Description

    16k UV Erasable CMOS EPROM General Description The HPC167064 is a member of the HPC family of High Performance microControllers Each member of the family has the same core CPU with a unique memory and I O...
  • Page 2: Absolute Maximum Ratings

    65 C to 150 C vice at absolute maximum ratings 300 C 55 C to 125 C for HPC167064 and V Test Conditions max f 30 0 MHz (Note 1) max f 20 0 MHz (Note 1)
  • Page 3: Ac Electrical Characteristics

    Note 5 Due to emulation restrictions actual limits will be better Note 6 Due to tester limitations actual limits will be better 55 C to 125 C for HPC167064 and V Parameter 100) depending on the following CPU instruction cycles its wait states and ready input...
  • Page 4 Data Output Valid before WR Rising Edge Hold of Data Valid after WR Rising Edge Falling Edge of ALE to Falling Edge of RDY RDY Pulse Width (Continued) 55 C to 125 C for HPC167064 and V Parameter Units Notes (Notes 1 2) (Notes 1 2)
  • Page 5 30 MHz AC Electrical Characteristics (See Notes 1 and 4 and Figures 1 thru 5 ) V Symbol and Formula CKI Operating Frequency CKI Clock Period CKI High Time CKIH CKI Low Time CKIL CPU Timing Cycle CPU Wait State Period WAIT Delay of CK2 Rising Edge after CKI Falling Edge DC1C2R...
  • Page 6 30 MHz AC Electrical Characteristics (See Notes 1 and 4 and Figures 1 thru 5 ) V Symbol and Formula ALE Falling Edge to RD Falling Edge Data Input Valid after Address Output Valid Data Input Valid after RD Falling Edge RD Pulse Width Hold of Data Input Valid after RD Rising Edge Bus Enable after RD Rising Edge...
  • Page 7: Timing Waveforms

    CKI Input Signal Characteristics Note AC testing inputs are driven at V for logic ‘‘1’’ and V FIGURE 2 Input and Output for AC Tests Timing Waveforms FIGURE 3 CK1 CK2 ALE Timing Diagram for a logic ‘‘0’’ Output timing measurements are made at V FIGURE 4 Write Cycle TL DD 11046 –...
  • Page 8 Timing Waveforms (Continued) TL DD 11046– 7 FIGURE 5 Read Cycle TL DD 11046 – 8 FIGURE 6 Ready Mode Timing TL DD 11046 – 9 FIGURE 7 Hold Mode Timing...
  • Page 9 Timing Waveforms (Continued) TL DD 11046– 10 FIGURE 8 MICROWIRE Setup Hold Timing TL DD 11046 – 11 FIGURE 9 UPI Read Timing TL DD 11046 – 12 FIGURE 10 UPI Write Timing...
  • Page 10: Functional Modes Of Operation

    Within this mode the on-chip EPROM cell acts as read only memory Each memory fetch is 16-bits wide HPC167064 operates to 20 MHz with 1 wait state for the on- chip memory The HPC167064 emulates the HPC16064 and HPC16083 except as described here...
  • Page 11 30W-sec cm The HPC167064 should be placed within 1 inch of the lamp tubes during erasure Some lamps have a filter on their tubes which should be removed before erasure The era-...
  • Page 12: Pin Descriptions

    Pin Descriptions The HPC167064 is available only in 68-pin LDCC package I O PORTS Port A is a 16-bit bidirectional I O port with a data direction register to enable each separate pin to be individually de- fined as an input or output When accessing external memo-...
  • Page 13: Connection Diagram

    TRI-STATE mode by reset- ting corresponding bits in the direction register Top View Order Number HPC167064 EL See NS Package Number EL68C A write operation to a port pin configured as an input causes...
  • Page 14 Ports A (Continued) TL DD 11046 – 20 FIGURE 12 Structure of Port B Pins B0 B1 B2 B5 B6 and B7 (Typical Pins) TL DD 11046– 21 FIGURE 13 Structure of Port B Pins B3 B4 B8 B9 B13 and B14 (Timer Synchronous Pins)
  • Page 15: Operating Modes

    EPROM The on-chip EPROM range of the HPC167064 is C000 to FFFF (16 kbytes) A logic ‘‘0’’ state on the EXM pin will cause the HPC device...
  • Page 16: Wait States

    Expanded ROMless 0300–FFFF Off-Chip SINGLE-CHIP ROMless MODE In this mode the on-chip EPROM of the HPC167064 is not used The address space corresponding to the on-chip EPROM is mapped into external memory so 16k of external memory may be used with the HPC167064 (see Table I)
  • Page 17 HPC167064 Interrupts (Continued) TL DD 11046 – 24 FIGURE 16 8-Bit External Memory TL DD 11046 – 25 FIGURE 17 16-Bit External Memory...
  • Page 18: Interrupt Processing

    The bits are set independently of the fact that the interrupts may be disabled IRPD is a Read Write register The bits corresponding to the maskable external interrupts are normally cleared by the HPC167064 after servicing the interrupts TABLE II Interrupts...
  • Page 20: Timer Overview

    The specified edge can also be programmed to generate an interrupt (see Fig- ure 19 ) The HPC167064 provides an additional 16-bit free running timer T8 with associated input capture register EICR (Ex- ternal Interrupt Capture Register) and Configuration Regis-...
  • Page 21: Timer Registers

    The shift clock is generated when the HPC167064 is config- ured as a master An externally generated shift clock on the SK pin is used when the HPC167064 is configured as a slave When the HPC167064 is a master the DIVBY regis-...
  • Page 22 HPC167064 microcontrollers interconnected to other MICROWIRE peripherals HPC167064 1 is set up as the master and initiates all data transfers HPC167064 2 is set up as a slave answering to the master The master microcontroller interfaces the operator with the...
  • Page 23 UART Wake-Up Mode The HPC167064 UART features a Wake-Up Mode of opera- tion This mode of operation enables the HPC167064 to be networked with other processors Typically in such environ- ments the messages consist of addresses and actual data...
  • Page 24: Universal Peripheral Interface

    The UPI contains an Input Buffer (IBUF) an Output Buffer (OBUF) and a Control Register (UPIC) In the UPI mode Port A on the HPC167064 is the data bus UPI can only be used if the HPC167064 is in the Single-Chip mode...
  • Page 25: Design Considerations

    Shared Memory Support (Continued) FIGURE 28 Shared Memory Application (HPC167064 Interface to Series 32000 System) Design Considerations TABLE III Memory Map of HPC167064 Emulating an HPC16064 FFFF FFF0 Interrupt Vectors FFEF FFD0 JSRP Vectors FFCF FFCE On-Chip ROM User Memory...
  • Page 26 Design Considerations (Continued) TABLE IV Memory Map of HPC167064 Emulating an HPC16083 FFFF FFF0 Interrupt Vectors FFEF FFD0 JSRP Vectors FFCF FFCE On-Chip EPROM E001 E000 User Memory DFFF DFFE External Expansion Memory 0201 0200 01FF 01FE On-Chip RAM User RAM...
  • Page 27 Design Considerations (Continued) Designs using the HPC family of 16-bit high speed CMOS microcontrollers need to follow some general guidelines on usage and board layout Floating inputs are a frequently overlooked problem CMOS inputs have extremely high impedance and if left open can float to any voltage You should thus tie unused inputs to or ground either through a resistor or directly Unlike the inputs unused output should be left floating to allow the...
  • Page 28: Addressing Modes

    HPC167064 CPU The HPC167064 CPU has a 16-bit ALU and six 16-bit regis- ters Arithmetic Logic Unit (ALU) The ALU is 16 bits wide and can do 16-bit add subtract and shift or logic AND OR and exclusive OR in one timing cycle...
  • Page 29 HPC Instruction Set Description Mnemonic Description BIT INSTRUCTIONS SBIT Set bit RBIT Reset bit IFBIT If bit MEMORY TRANSFER INSTRUCTIONS Load Load incr decr X Store to Memory Exchange Exchange incr decr X PUSH Push Memory to Stack Pop Stack to Memory Load A incr decr B Skip on condition Exchange incr decr B...
  • Page 30: Development Support

    Development Support The HPC167064 acts as a stand alone emulator for either the HPC16083 or the HPC16064 No separate development tool is thus provided to support this emulator device The...
  • Page 31 Development Support (Continued) PROGRAMMING SUPPORT The HPC167064 EPROM array can be programmed using a DATA I O Unisite model with a pinsite module No adaptor board is required with the DATA I O programmer Program- ming of the configuration bytes and security bits is de- scribed in the HPC Family User’s Manual...
  • Page 32: Part Selection

    The HPC family includes devices with many different options and configurations to meet various application needs The number HPC167064 has been generically used throughout this datasheet to represent the whole family of parts The following chart explains how to order various options available when ordering HPC family members...
  • Page 34: Physical Dimensions

    Physical Dimensions inches (millimeters) Order Number HPC167064EL or HPC467064EL LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose...

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