System Chart - Casio SF-8350 Service Manual & Parts List

10. CIRCUIT EXPLANATIONS

10-1. System chart

Generally, SF-8350 is working with the following steps.
12
Power supply chip
SC371015FU
VREG,V1~V4
Output
GND VDD2
for LCD
(Pin32)
drive
VDD
(Pin69)
INIT1
VDD
GND
KAC KIO
(Pin54)
(Pin53)
"L"
7
8
1. Supply 6V to VDD1 and VDD2.
2. Output VDD (4.5V).
3. Output "L" from SWO terminal.
4. Output "H" from LSO terminal.
5. Main switch ON.
6. Input "L" to SW terminal.
7. Output "L" from KAC terminal.
8. Push power on button switch.
(Pin31)
2
PDB
VDD
(Pin3)
VO1
(Pin2)
VDD1
Batteries
1
(Pin20)
CR-2032 X 2 pcs.
"H"
2 MHz
9
10
(Pin41)
(Pin45) (Pin40)
V2ON OSCI OSCO
(Pin70)
INT0
MAIN SWITCH
CPU
SW
(Pin36)
µ
6
PD3055GF002-2BA
EO
(Pin30)
"H"
ADDRESS BUS
DATA BUS
— 15 —
VDD
11
"H"
(Pin30) (Pin39)
VOT VDD GND
Gate array
µ
PD65005G-452-22
(Pin29)
VIN
MON
SWO VOB
LSO
(Pin25) (Pin40)
4
3
"H" "L"
VDD
OFF
ON
5
"L"
(Operation program)
µ
PD23C4001EBGW-301
15
(Pin22)
CE
"L"
16
ADDRESS
DATA
17
9. CPU oscillation is generated.
10. Output "H" from V2ON terminal.
11. Output "H" from VOT terminal.
12. Output all LCD drive voltages.
13. Output "L" from VOB terminal.
14. Apply VDD to ROM.
15. CPU sends ROM chip enable
signal from EO terminal.
16. CPU sends address to ROM.
17. CPU receives data from ROM.
(Pin17)
(Pin24)
LSI
Open
(Pin35)
13
"L"
Transistor Q1
VDD
(Pin2)
(Pin1)
(Pin3)
14
"H"
VCC GND
ROM