Ic Block Diagrams - Sony HCD-J300 Service Manual

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7-19.

IC BLOCK DIAGRAMS

IC101, 201 TDA7296
BIPOLAR
TRANSCONDACTANCE
INPUT STAGE
–
+
1 2 3 4 5
IC308 M62016L
COM
+
–
TE
L 13942296513
COM
+
–
1 2
GND INT
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.
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THERMAL
SHUTDOWN
MOS
MOS GAIN &
LEVEL SHIFTING OUTPUT
STAGE
STAGE
STANDBY/
MUTE
BOOST-
STRAP
6 7 8 9 10 11
INTERRUPT SIGNAL
GENERATING BLOCK
RESET SIGNAL
GENERATING BLOCK
3 4 5
RESET CD VCC
IC401 TA8189N
METAL
CH2/A CH2/B NF
OUT
24 23 22 21
CH2
–
+
CH1
+
x ao
y
–
i
1 2 3
CH1/A CH1/B NF METAL
OUT
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8
IC307 KA3082
SHORT
CIRCUIT
PROTECTION
12 13 14 15
IC309 BU1924F
16 15
Q Q
3 6 7 1 3
ANTI-ALIASING
PLL
57kHz
RDS/ARI
1 2
PRE TAPE A REC
VCC CG
OUT /TAPE B OUT
20 19 18 17 16
CH2
A/B
VREF1 IREF
VREF2
M/N
u163
.
GND
4 5 6 7 8 9
PRE MIX GND1 M/H REC
OUT OUT OUT
2 9 9 4 2 8
DRIVER OUT
PRE DRIVER
LOGIC
SWITCH
1 2 3 4 5 6 7
14 13 12 11
DIGITAL
CLOCK
1 5 0 5 8 2 9 9 4
8TH SWITCHED
CAPACITOR FILTER
COMPARATOR
FILTER
PLL BI-PHASE
1187.5Hz DECODER
ANALOG
3 4 5 6
REC
NF ALC
IN
15 14 13
–
+
ALC
m
CH1
+
co
–
GND
10 11 12
NF REC GND
IN
HCD-J300
9 9
TSD
8 9 10
10 9
TEST
2 8 9 9
DIFFERENTIAL
DECODER
7 8
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