Yamaha DVX-1000 Service Manual page 71

A B C
SCHEMATIC DIAGRAMS
DSP 1/2
1
DSP (1) 1/2
BUFFER
DVR IN
5.0
2.4 2.5
IC2
2.1
0
2
0 0
5.0 5.0
0 0
5.0 5.0
3
3.3
0
IC3
4
0
1.3
0
3.3
0
3.3
0
5
1.3
0
1.3
0
0
DECODER
0
1.7
1.3
0
1.7
3.3
0
1.3
0
3.2
No replacement part available.
3.3
6
3.3
サービス部品供給なし
0
1.3
3.0
0
1.3
3.3
3.3
1.3
3.3
0
1.3
3.3
0
0
1.3
1.3
0
7
8
9
16M SDRAM
IC2: MM74HCU04SJX IC6, 9: SN74AHCT08PWR
IC3: SN74AHC1G08DCKR
Hex inverters Quad 2 input AND
Single 2 input AND
IN B 1 5 VDD
1A 1 14 V A1 1 14 V
DD DD
IN A 2 1Y 2 13 6A B1 2 13 B4
10
3 4 2A 3 12 6Y Y1 3 12 A4
VSS OUT X
2Y 4 11 5A A2 4 11 Y4
3A 5 10 5Y B2 5 10 B3
3Y 6 9 4A Y2 6 9 A3
V SS 7 8 4Y V SS 7 8 Y3
D E F
NX-SW1000
BUFFER
1
DIR
IC8
0 3.3
2.1 3.3
0 3.3
0 0
IC4
0 0
3.3 3.3
0 1.5
1.6
0
0
1.7
3.3 3.3
0 0
IC6 IC9
0
D_F
1.7
0.2
1.7
1.3
3.3
1.3
0
0.7
1.3
0
3.3
1.7
1.7
3.3
D_SW
DSP
3.3
0
1.3
3.2
3.2
3.2
3.2
IC1
2.3
3.2
3.3
0
1.3
3.2
3.2
3.2
3.2
0
3.3
0
1.3
0
3.3
3.2
3.2
3.2
3.3
3.3
3.3
0
1.3
IC7
IC5
4M FLASH ROM
IC8: SN74LV245APWR
Octal 3-state bus transceivers
DIR 1 20 V CC
A1 2 19 ENG
A2 3 18 B1
IC11: PQ012FZ01ZPH
A3 4 17 B2 Rgulator
A4 5 16 B3
A5 6 15 B4
DC INPUT (VIN) 1 3 DC OUTPUT (VO)
A6 7 14 B5
I C
A7 8 13 B6
A8 9 12 B7 2 ON/OFF CONTROL (VC)
GND 10 11 B8 5
GND
G H I
5.0
0
0 0
MICRO-
0 0
0 0
0 0
0 PROCESSOR 0
0 0
0 0
0 0
0 0
5.0 0
1.0 0
2.4 IC13
0
2.6 5.0
2.6 2 0
0 5.0
2.5 0
5.0 0
5.0 0
0 0
0
0
2.5
2.5
0
1.7
IC10
1.7 FL
1.3 2.5
0 2.5
0
1.3
0
0
0
IC14
0
0
0
0
0
CODEC
0
0
IC15
0
SW
0
0
0
0
IC12
REGULATOR
IC11
2.9
3.3
1.3
2.7
0
Point q Pin 29 of IC4 Point w Pin 13 of IC13
IC14, 15: NJM4580E
Dual operational amplifier
OUT 1 1 8 +V CC
–IN 1 2 7 OUT 2
+ – + –
+IN 1 3 6 –IN 2
–V 4 5 +IN
CC 2
J K L
Page 73
to MAIN (1)_CB2
Page 74
to MAIN (2)_CB3
Page 74
to MAIN (2)_CB4
Page 72
to DSP (2)_CB201
to DSP (2)_CB202
3
CH1
3
CH2
5.0 5.0 12.2
IC16
0
2.1
RESET REGULATOR
IC1: D60YA003BPYP225
Decoder
Digital Signal Processors
EMIF32 L2 Cache/
L1P Cache
Memory
Direct Mapped
4 Banks
McASP1
64K Bytes 4K Bytes Total
Total
McASP0
(4-Way)
McBSP1
Instruction Fetch
McBSP0 Instruction Dispatch
L2 Instruction Decode
I2C1 Enhanced
Memory
DMA Data Path A
Controller
I2C0 DA610:
(16 channel) A Register File
192K Bytes
Timer 1
DA601:
64K Bytes .L1t .S1t .M1t .D1 .D2 .M2t .S2t .L2t
Timer 0
GP1
Point e
L1D Cache
2-Way Set
CH 1 : Out of IC16 GP0
R2 ROM
Associative
512K
CH 2 : Collector of Q1 4K Bytes Total
HPI16 Bytes
Total
Clock Generator,
Oscillator and PLL
x4 through x25 Multipliers
/1 through /32 Dividers
* All voltages are measured with a 10M Ω /V DC electronic volt meter.
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to
↑ ↑ those originally installed.
* Schematic diagram is subject to change without notice.
SYSTEM POWER SW ON SYSTEM POWER SW OFF
M N
DVX-1000
IC13: M30626FHPFP
Single-chip 16-bit CMOS microprocessor
8 8 8 8 8 8 8
Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 Port P6
<VCC2 ports> (4) <VCC1 ports> (4)
Internal peripheral functions
A/D converter System clock
(10-bit 8-channel generation circuit
X
Timer (16-bit) Expandable up to 26-channel)
XIN-XOUT
Output (timer A): 5
UART or XCIN-XCOUT
A2 Input (timer B): 6
clock synchronous serial I/O PLL frequency synthesizer
(8-bit X 3-channel) On-chip oscillator
Three-phase motor
control circuit CRC arithmetic circuit (CCITT)
Clock synchronous serial I/O
16 12 5
(Polynomial : X +X +X +1) (8-bit X 2-channel)
M16C/60 series16-bit Memory
microprocessor core
ROM (1)
Watchdog timer
(15-bit) R0H R0L SB
R1H R1L USP
RAM (2)
DMAC R2
ISP
R3
(2-channel)
INTB
A0
PC
D/A converter A1
(8-bit x 2-channel) FB FLG Multiplier
A3
<VCC1 ports> (4) <VCC2 ports> (4)
Port P11 Port P14 Port P12 Port P13
(3) (3) (3) (3)
8 2 8 8
NOTES :
1. ROM size depends on microprocessor type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
A5 IC4: LC89057W-VF4AD-E
Digital audio interface transceiver
EMPHA/UO AUDIO/VO INT CL CE CI XMODE
32 33 35 40 39 38 41
RXOUT 1 Microcontroller
Cbit, Ubit 37 DO
I/F
RX0 2
36 RERR
RX1 3
RX2 4
Input Demodulation
Data
RX3 5 & 21 RDATA
Selector Selector
Lock detect
RX4 8
RX5/VI 9
24 SDIN
RX6/UI
10
16
RMCK
LPF 13 PLL
17 RBCK
Clock 20 RLRCK
TMCK/PIO0 44
Selector
22 SBCK
TBCK/PIO1 45 Modulation
1/N
&
23 SLRCK
TLRCK/PIO2 46
Parallel Port
TDATA/PIO3 47
TXO/PIOEN 48
29 28 27 34
XIN XOUT XMCK CKST
E7
IC5: W9816G6CH-7
512K x 2 banks x 16 bits SDRAM
CLK 35
CLOCK
BUFFER
CKE 34
Page 72 E8
CONTROL COLUMN DECODER
CS 18
SIGNAL R
RAS 17 GENERATOR O
COMMAND
W
CAS 16 DECODER
D CELL ARRAY
2 DQ0
WE 15 E BANK #0
C
3 DQ1
O
D
E 5 DQ2
R
A10 20 6 DQ3
SENSE AMPLIFIER
8 DQ4
9 DQ5
MODE
A0 21 11 DQ6
REGISTER
12 DQ7
A3 24 ADDRESS
REFRESH DQ
BUFFER
COUNTER BUFFER 39 DQ8
A4 27
40 DQ9
A9 32
42 DQ10
BA 19
43 DQ11
45 DQ12
46 DQ13
REFRESH COLUMN
COLUMN DECODER 48 DQ14
COUNTER COUNTER
R
49 DQ15
O
W
D CELL ARRAY
E
BANK #1
C
O
D
E
14 LDQM
R
36 UDQM
SENSE AMPLIFIER
IC7: S29AL004D70TFI020
4M bit flash memory
DQ0–DQ15 (A-1)
RY/BY
SECTOR
SWITCHES
VCC
VSS
ERASE VOLTAGE
I/O BUFFERS
GENERATOR
WE
BYTE STATE
RESET CONTROL
COMMAND
REGISTER
PGM VOLTAGE
GENERATOR
STB
CHIP ENABLE
DATA LATCH
CE
OUTPUT ENABLE
OE
LOGIC
Y-DECODER Y-GATING
STB
VCC DETECTOR TIMER
X-DECODER CELL MATRIX
A0–A17
IC10: AK4628VQ
192 kHz 24-bit 8-channel CODEC
Audio
I/F
LIN 31 ADC HPF
RIN 32 ADC HPF
C67x TM CPU
Control
LOUT1 27 LPF DAC DATT MCLK 39 MCLK
Registers
LRCK LRCK
5
Control
ROUT1 28 LPF DAC DATT BICK 4 BICK
Logic
10 DAUX
Data Path B Test
LOUT2 25 LPF DAC DATT
B Register File
In-Circuit
Format
Emulation
Converter
ROUT2 26 LPF DAC DATT
Interrupt
Control
SDOUT
1 SDOS
LOUT3 23 LPF DAC DATT
9 SDTO
ROUT3 24 LPF DAC DATT SDIN1 6 SDTI1
SDIN2
7 SDTI2
SDIN3 8 SDTI3
SDIN4
LOUT4 21 LPF DAC DATT 12 SDTI4
Power-Down ROUT4 22 LPF DAC DATT
Logic
AK4628A
* 電圧は、内部抵抗10MΩの電圧計で測定したものです。
* Z印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
* 本回路図は、標準回路図です。改良のため予告なく変更することがございます。
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