Denon AVR-E300 Service Manual page 141

H27U1G8F2BTR-BC Block Diagram
A27 ~ A0
CONTROLLER
HV GENERATION
ALE
CLE
WE
CE
INTERFACE
WP
RE
Rev 1.1 / Sep. 2009
ADDRESS
REGISTER/
COUNTER
PROGRAM
ERASE
COMMAND
LOGIC
COMMAND
REGISTER
DATA
REGISTER
Figure 4 : Block Diagram
1 Gbit (128 M x 8 bit) NAND Flash
1024 Mbit + 32 Mbit
NAND Flash
MEMORY ARRAY
PAGE BUFFER
Y DECODER
BUFFERS
IO
141
H27U1G8F2B Series
X
D
E
C
O
D
E
R
15