Circuit Description; Receiver Circuits - Icom IC-V82 Service Manual

SECTION 4

4-1 RECEIVER CIRCUITS

4-1-1 ANTENNA SWITCHING CIRCUIT
The antenna switching circuit toggles receive line and transmit
line. This circuit does not allow transmit signals to enter the
receiver circuits.
Received signals from the antenna are passed through the
low-pass filter (LPF: L1, L2, C1–C5) and applied to the /
type antenna switching circuit (D1, D2).
While receiving, no voltage is applied to D1 and D2. Thus,
the receive line and the ground are disconnected and L15,
L58, C52, C76 and C516 function as a two-stage LPF which
leads received signals to the RF circuits via the limiter (D50).
4-1-2 RF CIRCUITS
The RF circuits amplify received signals within the range of
frequency coverage and filters off out-of-band signals.
The signals from the antenna switching circuit are passed
through a tunable bandpass filter (BPF: D9, L16, C79, C81),
then applied to the RF amplifier (Q12).
The amplified signals are passed through the limiter (D72)
and another two-stage BPF (D11, D12, D65, L19, L57, C92,
C94, C96, C97, C502–C505, C507) to suppress unwanted
signals. The filtered signals are then applied to the 1st mixer
circuit.
4-1-3 1st MIXER AND 1st IF AMPLIFIER CIRCUITS
The 1st mixer circuit converts received signals into the 1st
intermediate frequency (IF) signal by mixing with the local
oscillator (LO) signal. The converted 1st IF signal is filtered
at the 1st IF filter, then amplified at the 1st IF amplifier.
The signals from the two-stage BPF are converted into the
46.35 MHz 1st IF signal at the 1st mixer (Q13) by being
mixed with the 1st LO signals generated at the VCO (Q76,
D59, D60).
• 2ND IF AND DEMODULATOR CIRCUITS
"SQLIN" signal
from the D/A converter (IC10, pin 23)
AF "DET" signal
to the AF circuits
"DIGI_W" signal from the CPU (IC8, pin 81)

CIRCUIT DESCRIPTION

8 7
Noise
Active AMP
filter
Limiter
AMP
FM
detector
9 10 11
Q65
X3
The 1st IF signal from the 1st mixer is passed through the
crystal filter (FI1) to suppress unwanted signals, and the
limiter (D63) and then applied to the 1st IF amplifier (Q14).
The amplified 1st IF signal is applied to the FM IF IC (IC2,
pin 16).
4
4-1-4 2nd IF AND DEMODULATOR CIRCUITS
The 1st IF signal is converted into the 2nd IF signal and
demodulated by the FM IF IC. The FM IF IC contains 2nd
mixer, limiter amplifier, quadrature detector, etc. in its package.
The 1st IF signal from the 1st IF amplifier is applied to the
FM IF IC (IC2, pin 16), and mixed with the 45.9 MHz 2nd LO
signal from the tripler (Q81) at the mixer section, to convert
into the 450 kHz 2nd IF signal. The 2nd IF signal is output
from pin 3 and is filtered by the ceramic filter (FI2) to sup-
press the heterodyne noise. The filtered signal is applied to
IC2 (pin 5) again and amplified at the limiter amplifier section
and demodulated by the quadrature detector.
The quadrature detector is a detection method which uses a
ceramic discriminator (X3). Q65 is a mode switch and toggles
the detecting mode from wide and narrow, controlled by the
"DIGI_W" signal from CPU (IC8, pin 81).
The demodulated AF signals are output from pin 9.
4-1-5 AF CIRCUITS
The AF signals from FM IF IC (IC2, pin 9) are passed
through the AN switch (IC14, pins 10, 11), HPF (IC3, pins
6, 7), analog switch (IC4, pins 1, 2), the LPF (IC3, pins
13, 14) and analog switch (IC4, pins 10, 11). The signals
from the analog switch are applied to the D/A converter
(IC10, pins 11, 12) to adjust the AF output level, and then
passed through the emphasis switch (Q73) whitch toggles
the AF response characteristic according to the selected
operating mode (analog/FM or digital). The AF signals from
the emphasis switch are applied to the AF amplifier (IC5)
to obtain 300 mW of AF output power. The amplified AF
signals are applied to the internal speaker (SP1) via [SP]
jack (J3).
FI2
5 3
Noise
detector
Noise
Mixer
comparator
14
"NOIS" signal to the CPU (IC8, pin 26)
R5
4 - 1
45.9 MHz 2nd LO signal
PLL
2
IC
×3 (IC19)
1
2
Q81
IC2 TA31136FN
16
1st IF signal
from the IF amplifier (Q14)
X1
15.3 MHz