XDS Sigma 9 Manuals

Manuals and User Guides for XDS Sigma 9. We have 1 XDS Sigma 9 manual available for free PDF download: Reference Manual

XDS Sigma 9 Reference Manual

XDS Sigma 9 Reference Manual (182 pages)

Brand: XDS | Category: Desktop | Size: 13.02 MB

Table of Contents

Table of Contents
5
Sigma 9 System
8
Introduction
8
General Characteristics
9
General-Purpose Features
11
Input/Output Capabi I Ities
11
Time-Sharing Features
12
Real-Time Features
12
Multiusage Features
14
Multiprocessor Features
14
- Multiprocessor Interlock
  14
- Homespace
  14
- Multiport Memory System
  14
- Manual Partitioning Capability
  15
- Multiprocessor Control Function
  15
- Shared Input/Output
  15
SIGMA 9 SYSTEM ORGANIZA Non
16
Central Processing Unit
16
- General Registers
  16
- Memory Control Storage
  16
- A Typical SIGMA 9 System
  17
Central Processing Unit
18
- Computer Modes
  19
- Information Format
  19
- SIGMA 9 Computer System
  19
- Information Boundaries
  20
- Instruction Register
  20
Main Memory
21
- Memory Unit
  21
- Virtual and Real Memory
  22
- Homespace
  22
- Memory Reference Address
  22
Homespace Layout
23
Addressing Logic
24
- Types of Addressing
  25
  - Extended Addressi Ng
    25
- Address Modification Examples
  28
Index Displacement AI Ignment (Real and Virtual Addressing Modes)
29
- Memory Address Control
  30
Generation of Effective Virtual Address, Real
32
- Program Status Doubleword
  34
Computer Operating and Addressing Modes
36
- Internal Interrupts
  37
Interrupt System
36
Interrupt Priority Chain
37
- Externa I Interrupts
  38
- States of an Interrupt Level
  38
Operational States of an Interrupt Level
39
Trap System
41
- Trap
  41
- Trap Entry Sequence
  41
- Trap Masks
  41
- Trap Condition Code
  41
- Trap Addressing
  41
- Nonallowed Operation Trap
  43
- Unimplemented Instruction Trap
  44
- Push-Down Stack Limit Trap
  45
- Fixed-Point Overflow Trap
  45
- Floating-Point Arithmetic Fault Trap
  46
- Decimal Arithmetic Fault Trap
  47
- CALL Instruction Trap
  47
- Processor Detected Fau Its
  47
- Trap Conditions During Hanti Cipatejl Operations
  50
- Register Altered Bit
  50
Registers Changed at Time of a Trap Due to
50
3. in Struction Repertoire
52
Load/Store Instructions
54
Status Word 0
60
Status Word
61
Analyze/Interpret Instructions
65
Fixed-Point Arithmetic Instructions
67
Comparison Instructions
73
- Codes
  74
Logical Instructions
76
Shift Instructions
77
- Floating-Point Shift
  79
Floating-Point Number Representation
82
Condition Code Settings for Floating-Point
84
- Zoned Decimal Numbers
  87
- Decimal Accumulator
  87
- Decimal Instruction Format
  87
- Illegal Digit and Sign Detection
  87
- Overflow Detection
  87
- Decimal Instruction Nomenclature
  88
- Condition Code Settings
  88
Byte-String Instructions
98
Push-Down Instructions
101
- Stack Pointer Doubleword (SPD)
  102
- Push-Down Condition Code Settings
  102
Execute/Branch Instructions
106
- Branches in Real Extended Addressing Mode
  107
- Nonallowed Operation Trap During Execution of Branch Instruction
  107
CALL Instructions
109
Control Instructions
110
- Program Status Doubleword
  110
- Loading the Memory Map
  114
- Loading the Access Protection Controls
  115
- Loading the Memory Write Protection Locks
  115
- Interruption of MMC
  116
- (Mode 0)
  117
- Read Direct, Interrupt Control (Mode 1)
  117
- Write Direct - Internal Computer Control (Mode 0)
  118
- Write Direct, Interrupt Control (Mode 1)
  120
Input/Output Instructions
121
- I/O Addresses
  121
- Processor Addresses (Bits 19-23)
  121
- Device Controller Addresses (Bits 24-31)
  121
- I/O Status Response
  122
- Status Information for SIO
  122
- General Registers
  124
Input/Output Operations
130
- Operational Command Doublewords
  131
  - Order
    131
  - Memory Byte Address
    131
  - Flags
    131
  - Byte Count
    133
- Control Command Doublewords
  133
Operator Controls
135
- Contro I Mode
  135
- Processor Contro I Pane I
  136
  - Memory Clear
    136
  - Sys Reset
    136
  - I/Oreset
    136
  - Load
    136
  - Unit Address
    136
  - Sense
    136
  - Not Normal
    136
  - Halt
    136
  - Wait
    137
  - Run
    137
  - Program Status Doubleword
    137
- Program Status Doubleword (PSD)
  137
  - Insert
    138
  - Cpu Reset
    138
  - Interrupt
    138
  - Address Stop
    138
  - Select Address
    139
  - Display (Switch)
    139
  - Instr Addr
    139
  - DISPLAY (Indicator)
    140
  - Display Format
    140
  - Format Sel
    140
  - Data
    140
  - Store
    140
  - Compute
    140
- Maintenance Controls
  141
  - Alarm
    141
  - Margins
    141
  - Phases
    141
  - Clock Mode
    141
  - Snap
    141
  - Memory Mode
    142
  - Override Mode
    142
  - Scan
    142
  - Loading Operation
    143
- Operating Procedures
  144
Refere Nce Tables
146
- XDS Standard Symbols and Codes
  146
- XDS Standard Character Sets
  146
- Contro I Codes
  146
- Special Code Properties
  146
- Xds Standard 8-Bit Computer Codes (Ebcdic)
  147
- Xds Standard 7-Bit Communication Codes (Usascii)
  147
- XDS Standard Symbol-Code Correspondences
  148
- Hexadecimal Arithmetic
  152
  - Addition Table
    152
  - Multiplication Table
    152
  - Table of Powers of Sixteen
    153
- Hexadecimal-Decimal Integer Conversion Table_146
  154
- Hexadecimal-Decimal Fraction Conversion Table_152
  160
- Table of Powers of Two Mathematical Constants
  164
- Sigma 9 Instruction List
  165
- Instruction Timing
  166
- Timing Considerations
  166
  - Effects of Memory Interference
    166
  - Effects of Indexing
    166
  - Effects of Indirect Addressing
    166
- System Reliability and Maintainability
  174
- System Maintainabi I Ity Features
  174
  - CPU Features
    175
Processor Control Panel
175
- Main Memory Features
  177
- Multiplexor Input/Output Processor
  177
  - (MIOP) Features
    177
  - High-Speed RAD I/O Processor (HSRIOP) Features
    178
- Glossary of Symbolic Terms
  179
Trap
181
- Instructions
  181

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