VMIC VMICPCI-7715 Manuals

Manuals and User Guides for VMIC VMICPCI-7715. We have 1 VMIC VMICPCI-7715 manual available for free PDF download: Product Manual

VMIC VMICPCI-7715 Product Manual

VMIC VMICPCI-7715 Product Manual (192 pages)

Single Board, All Rear I/O Pentium III Socket 370 Processor-Based CompactPCI SBC

Brand: VMIC | Category: Motherboard | Size: 1 MB

Table of Contents

Table of Contents
5
Overview

15
- Organization of the Manual
  16
- References
  17
- Safety Summary
  20
- Safety Symbols Used in this Manual
  21
Chapter 1 - VMICPCI-7715 Features and Options

23
- PC/AT I/O Features
  24
  - Table 1-1
    24
  - Figure 1-1 VMICPCI-7715 Block Diagram
    25
  - Compactpci Features
    26
    
    VMICPCI-7715 Product Options
    26
Chapter 2 - Installation and Setup

29
Chapter 3 - PC/AT Functions

37
- CPU Socket
  38
- Physical Memory
  38
- Memory and Port Maps
  39
  - Memory Map
    39
  - I/O Port Map
    39
  - Table 3-1 VMICPCI-7715, Interface Memory Address Map
    39
  - Table 3-2 VMICPCI-7715 I/O Address Map
    40
  - PCI-To-PCI Bridge
    41
- PC/AT Interrupts
  42
- Table 3-3 PC/AT Hardware Interrupt Line Assignments
  42
- PCI Interrupts
  46
- I/O Ports
  47
- Figure 3-1 Connections for the PC Interrupt Logic Controller
  47
- Video Graphics Adapter
  48
- Table 3-6 Supported Graphics Video Resolutions
  48
- Table 4-1
  48
- Table 4-8
  48
- Ethernet Controller
  49
  - 10Baset
    49
  - 100Basetx
    49
Chapter 4 - Embedded PC/RTOS Features

51
- Diskonchip (Optional)
  52
- Watchdog Timer
  54
  - Time of Day Registers
    56
  - Time of Day Alarm Registers
    57
  - Watchdog Alarm Registers
    58
  - Command Register
    58
- Timers
  60
  - General
    60
  - Timer Interrupt Status
    60
  - Figure 4-2 Timer Interrupt Status Register Read/Steps
    60
  - Clearing the Interrupt
    61
  - Timer Programming
    61
    
    Architecture
    61
    
    Figure 4-3 Timer Interrupt Status Register
    61
    
    Figure 4-4 Clearing the Timer Interrupt Status Register
    61
    
    Table 4-3 I/O Address of the Control Word Register and Timers
    61
    
    Writing
    63
    
    Table 4-5
    64
    
    Table 4-6
    64
    
    Table 4-7
    64
    
    Reading
    65
    
    Table 4-9
    66
    
    Table 4-10 Read-Back Command Description
    66
    
    Table 4-11
    66
    
    Table 4-13
    67
  - Mode Definitions
    68
- Battery Backed SRAM
  69
- Smbus Multiplexer
  70
- Table 4-14 Smbus Multiplexer Address
  70
- Table 4-15
  70
Chapter 5 - Maintenance

71
- Maintenance Prints
  71
Appendix A - Connector Pinouts

73
- Figure A-1 VMICPCI-7715 Connector Locations
  74
- J1 Connector Pinout
  75
- Table 4-2
  75
- J2 Connector Pinout
  76
- J4 Connector Pinout
  77
- J5 Connector Pinout
  78
- PMC J7 Connector Pinout
  79
- PMC J8 Connector Pinout
  80
- PMC J6 Connector Pinout
  81
Appendix B - System Driver Software

83
Appendix C - Phoenix BIOS

89
- System BIOS Setup Utility
  89
- Help Window
  89
- Main Menu
  90
  - Quickboot
    90
  - Setting the Time
    90
  - Setting the Date
    90
  - Legacy Diskette
    91
    
    Floppy Drive a
    91
    
    Floppy Drive B
    91
  - Primary Master/Slave
    91
  - Secondary Master
    92
  - Keyboard Features
    92
    
    Numlock
    92
    
    Key Click
    92
    
    Keyboard Auto-Repeat Rate (Chars/Sec)
    92
    
    Keyboard Auto-Repeat Delay (Sec)
    93
    
    Keyboard Test
    93
  - System Memory
    93
  - Extended Memory
    93
  - Console Redirection
    93
    
    Com Port Address
    94
    
    Baud Rate
    94
    
    Console Type
    94
    
    Flow Control
    94
    
    Console Connection
    94
    
    Console Redirection after POST
    94
- Advanced Menu
  95
  - Installed O/S
    95
  - Acpi
    95
  - Reset Configuration Data
    95
  - Cache Memory
    95
  - I/O Device Configuration
    96
  - Large Disk Access Mode
    97
  - Local Bus IDE Adapter
    97
  - Advanced Chipset Control
    97
    
    Graphics Aperture
    97
    
    Enable Memory Gap
    98
    
    ECC Config
    98
    
    Serr
    98
- Power
  99
- Boot Menu
  100
- Exit Menu
  101
  - Exit Saving Changes
    101
  - Exit Discarding Changes
    101
  - Load Setup Defaults
    101
  - Discard Changes
    101
  - Save Changes
    101
Appendix D - Lanworks BIOS

103
- Boot Menus
  104
  - First Boot Menu
    104
  - Boot Menu
    104
- BIOS Features Setup
  106
  - Rpl
    106
  - Tcp/Ip
    106
  - Netware
    107
  - Pxe
    107
Appendix E - Device Configuration: I/O and Interrupt Control

109
- BIOS Operations
  110
  - BIOS Control Overview
    110
  - Functional Overview
    110
  - Figure E-1 VMICPCI-7715 Block Diagram
    111
  - Data Book References
    112
- Device Address Definition
  114
  - ISA Devices
    114
  - Table E-1 ISA Device Mapping Configuration
    114
  - PCI Devices
    115
  - Table E-2 PCI Device Mapping Configuration
    115
- Device Interrupt Definition
  116
Appendix F - Sample C Software

119
- Directory CPU
  120
  - Cpu.C
    120
  - File: Cpu.h
    128
  - File: Flat.C
    129
  - File: Flat.h
    135
  - File: Pci.C
    137
  - File: Pci.h
    140
  - File: Universe.h
    141
- Directory Smbus
  166
  - FILE: Pci.h
    166
  - File: Scan.h
    168
- Directory SRAM
  169
  - File: T_SRAM.C
    169
- Directory Timers
  172
  - File: CPU.H
    172
  - File: PCI.H
    174
  - File: PCI.C
    176
  - File: T_Timers.C
    179
  - File: Timer.C
    183
- Directory WATCHDOG
  188
  - File: Watchdog.h
    188
  - File: WDT0_RST.C
    189
Index

191

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