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THCV241A
THine THCV241A Manuals
Manuals and User Guides for THine THCV241A. We have
1
THine THCV241A manual available for free PDF download: Manual
THine THCV241A Manual (68 pages)
SerDes transmitter with bi-directional transceiver with processor by V-by-One HS
Brand:
THine
| Category:
Recording Equipment
| Size: 0 MB
Table of Contents
General Description
1
Features
1
Block Diagram
1
Table of Contents
2
Pin Configuration
4
Pin Description
5
Functional Description
6
Functional Overview
6
Reference Clock Supply
6
MIPI Input Setting
7
Htpdn/Lockn
8
V-By-One® HS Output Setting
9
MPRF (Main-Link Private Format)
9
V-By-One® HS Standard Format
10
V-By-One® HS Output Byte Mode
16
V-By-One® HS Output Distribution Mode
16
V-By-One® HS Low Radiation Emission or High Immunity Resistance Mode
16
V-By-One® HS Output Odd/Even Swap
17
V-By-One® HS Output Drivability
17
V-By-One® HS Output Low Frequency Mode
17
Target Pixel Clock
18
Blanking Period Restriction under Low MIPI Data-Rate Environment
18
PLL Setting
19
PLL Auto Setting Function
22
V-By-One® HS Output Data-Rate
23
V-By-One® HS Output Spread Spectrum
23
V-By-One® HS CRC
24
MIPI Packet Header V-By-One® HS Output Bridge Mode
25
MIPI Virtual Channel Bridge
26
V-By-One® HS VSYNC Generation
27
V-By-One® HS HSYNC Generation
28
MIPI Short Packet V-By-One® HS Output Bridge Mode
30
2-Wire Serial Interface
32
2-Wire Serial I/F Slave Device ID
32
2-Wire Serial Read/Write Access to Local Register
33
2-Wire Serial I/F Watch Dog Timer
34
Register Auto Checksum Diagnosis
34
Sub-Link Setting
35
Sub-Link 2-Wire Set and Trigger Mode (2-Wire Normal Mode)
37
Sub-Link Watch Dog Timer
40
Sub-Link Interrupt Detection
41
GPIO Setting
42
Sub-Link Polling GPIO Input/Output
42
Register GPIO
44
Internal Error / Status Signal Monitoring GPIO Output
45
Internal Error / Status Signal Monitoring Register
46
Interrupt Monitoring
47
Build-In Self-Test Pattern Generator (BIST)
49
Main-Link Field BET
51
Sub-Link Field BET Operation and Output from GPIO
51
CMOS IO Input Noise Filter
52
CMOS Output Drive Strength
52
CKO Reference Clock Buffer Output
53
Soft Reset
54
Power on Sequence
56
Lock / Re-Lock Sequence
57
Absolute Maximum Ratings
58
Recommended Operating Conditions
58
Consumption Current
59
DC Specifications
61
CMOS DC Specifications
61
MIPI Receiver DC Specifications
61
CML Transmitter DC Specifications
62
CML Bi-Directional Buffer DC Specifications
63
AC Specifications
64
MIPI Receiver AC Specifications
64
CML Transmitter AC Specifications
64
CML B-Directional Buffer AC Specifications
64
2-Wire Serial Master/Slave AC Specifications
65
Package
67
Notices and Requests
68
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