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TPS650350-Q1 EVM
Texas Instruments TPS650350-Q1 EVM Manuals
Manuals and User Guides for Texas Instruments TPS650350-Q1 EVM. We have
1
Texas Instruments TPS650350-Q1 EVM manual available for free PDF download: User Manual
Texas Instruments TPS650350-Q1 EVM User Manual (39 pages)
Brand:
Texas Instruments
| Category:
Motherboard
| Size: 3.28 MB
Table of Contents
Table of Contents
1
Introduction
3
Requirements
3
Operation Instructions
3
Table 3-1. Adapter Power Source (J24)
3
Table 3-2. Dedicated LDO Supply for Adapter (J25)
3
Table 3-3. Adapter PMIC Connections
3
Table 3-4. Buck 1 Power Source (J3)
4
Table 3-5. MID-Vin (Buck1) Features
4
Table 3-6. MID-Vin (Buck1) Configurable Settings
4
Table 3-7. Buck 2 Power Source (J4)
4
Table 3-8. Buck 3 Power Source (J5)
4
Table 3-9. Low-Vin (Buck2 and Buck3) Features
5
Table 3-10. Low-Vin (Buck2 and Buck3) Configurable Settings
5
Table 3-11. Low Noise LDO Features
5
Table 3-12. Low Noise LDO Configurable Settings
5
Table 3-13. VIO Power Source (J6)
5
EVM Configurations
6
Figure 4-1. TPS650350-Q1 EVM Top View
6
Table 3-14. I2C Pull-Up Source (J6)
6
Test Points
7
Table 5-1. TPS650350-Q1 EVM Test Points
7
Graphical User Interface
8
Figure 5-1. TPS650350-Q1 EVM Test Point Locations
8
Figure 6-1. TPS650350-Q1 EVM Debugging Flow
9
Figure 6-2. Opening Serial Port Options
10
Figure 6-3. Selecting an Alternate Port
10
Figure 6-4. Tps6503Xx-Q1 GUI Home Screen
11
Figure 6-5. Tps6503Xx-Q1 GUI Block Diagram Page
12
Figure 6-6. Register Page Interfaces
12
Figure 6-7. Tps6503Xx-Q1 GUI Device Configuration Page
13
Figure 6-8. Device Selection for Generating NVM Settings
14
Figure 6-9. Example Settings Output
14
Table 6-1. Functionally Equivalent Generic Part Numbers
14
Figure 6-10. Sequencing Overview Tab
15
Figure 6-11. Sequencing Overview Including GPIO
15
Figure 6-12. GUI Generated Timing Diagram
16
Figure 6-13. Tps6503Xx-Q1 GUI Re-Program PMIC Page
17
Figure 6-14. GUI Configuration CRC Script
18
Typical Performance Plots
19
Figure 7-1. TPS650350-Q1 Default Power up Sequence
19
Figure 7-2. TPS650350-Q1 Default Power down Sequence
19
Figure 7-3. Buck 1 Load Transient
19
Figure 7-4. Buck 2 Load Transient
19
Figure 7-5. Buck 3 Load Transient
20
Figure 7-6. LDO Load Transient
20
Figure 7-7. Buck 1 Output Voltage Ripple
20
Figure 7-8. Buck 2 Output Voltage Ripple
20
Figure 7-9. Buck 3 Output Voltage Ripple
21
Figure 7-10. LDO Output Noise Density
21
TPS650350-Q1 EVM Schematic
22
Figure 8-1. TPS650350-Q1 Schematic
22
Figure 8-2. MSP432E401Y Schematic
23
TPS650350-Q1 EVM PCB Layers
24
Figure 9-1. Top Layer
24
Figure 9-2. MID-Layer 1
25
Figure 9-3. MID-Layer 2
26
Figure 9-4. MID-Layer 3
27
Figure 9-5. MID-Layer 4
28
Figure 9-6. Bottom Layer (Mirrored)
29
TPS650350-Q1 EVM Bill of Materials
30
Table 10-1. TPS650350-Q1 EVM Bill of Materials
30
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