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Texas Instruments C2650 manual available for free PDF download: Technical Reference Manual
Texas Instruments C2650 Technical Reference Manual (1570 pages)
CC26 series SimpleLink Wireless MCU
Brand:
Texas Instruments
| Category:
Microcontrollers
| Size: 7.39 MB
Table of Contents
Table of Contents
2
Revision History
10
Preface
11
1 Architectural Overview
13
Target Applications
14
Overview
14
Functional Overview
17
ARM Cortex-M3
17
On-Chip Memory
18
Radio
19
AES Engine with 128-Bit Key Support
19
General-Purpose Timers
20
Direct Memory Access
20
System Control and Clock
21
Serial Communications Peripherals
21
Programmable Ios
24
Sensor Controller
24
Random Number Generator
25
Cjtag and JTAG
25
Power Supply System
25
2 The Cortex-M3 Processor
28
The Cortex-M3 Processor Introduction
29
Block Diagram
29
Overview
30
System-Level Interface
30
Integrated Configurable Debug
30
Trace Port Interface Unit
31
Cortex-M3 System Component Details
31
Programming Model
31
Processor Mode and Privilege Levels for Software Execution
32
Stacks
32
Exceptions and Interrupts
32
Data Types
32
Coretex-M3 Core Registers
33
Core Register Map
34
Core Register Descriptions
34
Instruction Set Summary
47
Cortex-M3 Processor Registers
50
CPU_ITM Registers
51
CPU_DWT Registers
92
CPU_FPB Registers
117
CPU_SCS Registers
129
CPU_TPIU Registers
207
3 Cortex™-M3 Peripherals
220
Cortex™-M3 Peripherals Introduction
221
SWCU117A - February 2015 - Revised March 2015
221
Functional Description
221
Systick
221
Nvic
222
System Control Block (SCB)
223
Instrumentation Trace Macrocell Unit (ITM)
223
Flash Patch and Breakpoint Unit (FPB)
223
Trace Port Interface Unit (TPIU)
224
Data Watchpoint and Trace Unit (DWT)
224
4 Interrupts and Events
227
Exception Model
228
Exception States
228
Exception Types
228
Exception Handlers
231
Vector Table
231
Exception Priorities
232
Interrupt Priority Grouping
232
Exception Entry and Return
233
Fault Handling
235
Fault Types
235
Fault Escalation and Hard Faults
236
Fault Status Registers and Fault Address Registers
236
Lockup
236
Event Fabric
237
Introduction
237
Event Fabric Overview
238
AON Event Fabric
238
Common Input Event List
239
Event Subscribers
239
MCU Event Fabric
240
Common Input Event List
241
Event Subscribers
244
Interrupts and Events Registers
245
AON_EVENT Registers
246
EVENT Registers
270
5 JTAG Interface
389
Top Level Debug System
390
Cjtag
392
JTAG Commands
394
Programming Sequences
396
Icepick
397
Secondary Taps
397
Icepick™ Registers
399
ROUTER Scan Chain
402
TAP Routing Registers
403
Icemelter
408
Serial Wire Viewer (SWV)
408
Halt in Boot (HIB)
408
Debug and Shutdown
409
Debug Features Supported through WUC TAP
409
Profiler Register
409
6 Power, Reset, and Clock Management
411
Introduction
412
System CPU Mode
413
SWCU117A - February 2015 - Revised March 2015
413
Supply System
413
Digital Power Partitioning
415
Clock Management
417
Power Modes
422
Reset
426
PRCM Registers
427
PRCM Registers
428
AON_SYSCTL Registers
488
AON_WUC Registers
493
DDI_0_OSC Registers
509
7 Versatile Instruction Memory System (VIMS)
529
VIMS Configurations
531
VIMS Modes
531
VIMS Flash Line Buffering
534
VIMS Arbitration
534
VIMS Cache TAG Prefetch
534
VIMS Software (SW) Remarks
534
Flash Program or Update
534
VIMS Retention
534
VIMS Registers
537
STAT Register (Offset = 0H) [Reset = X]
538
CTL Register (Offset = 4H) [Reset = X]
539
Rom
540
Eefuse
540
Flash
540
FLASH Memory Protection
540
Memory Programming
540
FLASH Memory Programming
541
FLASH Read Timings
541
Power Mode Operations
541
VIMS Registers
541
FLASHMEM Registers
542
FLASH Registers
543
ROM Functions
669
Sram
670
8 Bootloader
671
Bootloader Functionality
672
Bootloader Disabling
672
Bootloader Backdoor
672
Bootloader Interfaces
672
Packet Handling
673
Transport Layer
674
Serial Bus Commands
676
9 Device Configuration
685
Customer Configuration (CCFG)
686
CCFG Registers
687
Factory Configuration (FCFG)
713
FCFG1 Registers
714
10 Cryptography
797
AES Cryptoprocessor Overview
798
Functional Description
798
Power Management and Sleep Modes
799
Hardware Description
799
Module Description
800
Performance
810
Programming Guidelines
811
Conventions and Compliances
820
Cryptography Registers
822
CRYPTO Registers
823
11 O Control
867
Introduction
868
IOC Overview
868
I/O Mapping and Configuration
869
Basic I/O Mapping
869
MAP AUXIO from the Sensor Controller to DIO Pin
869
Map 32-Khz System Clock (LF Clock) to DIO/PIN
870
Edge Detection on Pin (DIO)
870
Configure DIO as GPIO Input to Generate Interrupt on EDGE DETECT
870
AON IOC State Latching When Powering off the MCU Domain
870
Unused I/O Pins
871
Gpio
871
I/O Pin Mapping
872
Peripheral Portids
873
I/O Pin
873
Physical Pin
873
Pin Configuration
874
I/O Control Registers
875
AON_IOC Registers
876
IOC Registers
883
GPIO Registers
1012
12 Micro Direct Memory Access (Μdma)
1035
Μdma Introduction
1036
Block Diagram
1036
Functional Description
1037
Channel Assignments
1037
Priority
1039
Arbitration Size
1039
Request Types
1039
Channel Configuration
1040
Transfer Modes
1041
Transfer Size and Increments
1050
Peripheral Interface
1050
Software Request
1050
Interrupts and Errors
1051
Initialization and Configuration
1051
Module Initialization
1051
Configuring a Memory-To-Memory Transfer
1052
Configuring Channel Assignments
1052
Μdma Registers
1052
UDMA Registers
1053
13 Timers
1073
General-Purpose Timers
1074
Block Diagram
1074
Functional Description
1075
GPTM Reset Conditions
1076
Timer Modes
1076
Wait-For-Trigger Mode
1083
Synchronizing GP Timer Blocks
1083
Accessing Concatenated 16- and 32-Bit GPTM Register Values
1084
Initialization and Configuration
1084
One-Shot and Periodic Timer Modes
1084
Input Edge-Count Mode
1085
Input Edge-Timing Mode
1085
PWM Mode
1086
Producing DMA Trigger
1086
General-Purpose Timer Registers
1086
GPT Registers
1087
14 Real-Time Clock
1124
Introduction
1125
Functional Specifications
1125
Functional Overview
1125
Free-Running Counter
1125
Channels
1125
Events
1126
RTC Registers
1126
Register Access
1126
Entering and Wakeup from Sleep
1127
AON_RTC:SYNC] Register
1127
Real-Time Clock Registers
1127
AON_RTC Registers
1128
15 Watchdog Timer
1142
WDT Introduction
1143
WDT Functional Description
1143
WDT Initialization and Configuration
1144
Watchdog Timer Registers
1144
WDT Registers
1145
16 Random Number Generator
1155
Overview
1156
Block Diagram
1156
TRNG Software Reset
1157
Interrupt Requests
1157
TRNG Operation Description
1158
TRNG Shutdown
1158
TRNG Alarms
1159
TRNG Entropy
1159
TRNG Low-Level Programing Guide
1160
Initialization
1160
Random Number Generator
1162
TRNG Registers
1163
17 AUX - Sensor Controller with Digital and Analog Peripherals
1186
Introduction
1187
AUX Hardware Overview
1188
Memory Mapping
1189
Alias of Commonly Used Registers
1189
IO Mapping
1191
Modules
1191
Sensor Controller
1191
GPIO Control
1200
AUX Timers
1203
Time-To-Digital Converter
1203
Semaphores
1204
Oscillator Configuration Interface (DDI)
1204
Analog Configuration Interface (ADI)
1204
Analog MUX
1205
Adc
1205
Comparators
1208
Current Source
1208
Power Management
1208
Startup
1208
Power Mode Management
1208
Wakeup Events
1209
MCU Bus Connection
1210
Clock Management
1210
System Clocks
1210
Sensor Controller Clock
1211
Peripheral Clocks
1211
Use Cases
1211
RTC Calibration
1211
Capacitive Sensing
1211
Pulse Counting
1211
AUX - Sensor Controller Registers
1211
AUX_AIODIO Registers
1212
AUX_TDC Registers
1221
AUX_EVCTL Registers
1235
AON_WUC Registers
1257
AUX_TIMER Registers
1273
AUX_SMPH Registers
1282
AUX_ANAIF Registers
1292
ADI_4_AUX Registers
1299
18 Battery Monitor and Temperature Sensor
1311
Introduction
1312
Functional Description
1312
BATMON Registers
1312
AON_BATMON Registers
1313
19 Universal Asynchronous Receivers and Transmitters (UARTS)
1327
Universal Asynchronous Receiver/Transmitter
1328
Block Diagram
1329
Signal Description
1329
Functional Description
1329
Transmit and Receive Logic
1330
Baud-Rate Generation
1330
Data Transmission
1330
Modem Handshake Support
1331
FIFO Operation
1332
Interrupts
1332
Loopback Operation
1333
Interface to DMA
1333
Initialization and Configuration
1334
UARTS Registers
1335
UART Registers
1336
SWCU117A - February 2015 - Revised March 2015
1353
20 Synchronous Serial Interface (SSI)
1353
Synchronous Serial Interface
1354
Block Diagram
1355
Signal Description
1356
Functional Description
1356
Bit Rate Generation
1356
FIFO Operation
1356
Interrupts
1357
Frame Formats
1358
DMA Operation
1364
Initialization and Configuration
1365
SSI Registers
1366
SSI Registers
1367
21 Inter-Integrated Circuit (I C) Interface
1378
Inter-Integrated Circuit Interface
1379
Block Diagram
1379
Functional Description
1379
C Bus Functional Overview
1380
Available Speed Modes
1382
Interrupts
1382
Loopback Operation
1383
Command Sequence Flow Charts
1383
Initialization and Configuration
1391
C Registers
1391
I2C Registers
1392
22 Integrated Interchip Sound (I2S) Module
1411
Introduction
1412
Digital Audio Interface
1412
Frame Configuration
1413
Pin Configuration
1413
Clock Configuration
1413
WCLK, BCLK, and MCLK Division Ratio
1414
Serial Interface Formats
1414
I2S
1414
Left Justified (LJF)
1415
Right Justified (RJF)
1415
Dsp
1416
Memory Interface
1417
Word Lengths
1417
Audio Channels
1417
Memory Buffers and Pointers
1418
Samplestamp Generator
1418
Counters and Registers
1419
Starting Input and Output Pins
1420
Samplestamp Capturing
1420
Usage
1421
Start-Up Sequence
1421
Termination Sequence
1422
I2S Registers
1422
I2S Registers
1423
23 Radio
1454
RF Core
1455
High-Level Description and Overview
1455
Radio Doorbell
1456
Operational Description
1457
RF Core HAL
1457
Hardware Support
1457
Firmware Support
1457
Command Definitions
1468
Protocol-Independent Direct and Immediate Commands
1481
Immediate Commands for Data Queue Manipulation
1487
Data Queue Usage
1491
Operations on Data Queues Only Available for Internal Radio CPU Operations
1491
Radio CPU Usage Model
1493
Ieee
1494
IEEE 802.15.4 Commands
1494
Interrupts
1501
Data Handling
1501
Radio Operation Commands
1502
Immediate Commands
1514
Bluetooth Low Energy
1515
Bluetooth Low Energy Commands
1515
Interrupts
1524
Data Handling
1524
Radio Operation Command Descriptions
1525
Immediate Commands
1546
Radio Registers
1546
RFC_DBELL Registers
1547
RFC_PWR Registers
1565
RFC_RAT Registers
1568
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