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QPHY-DP2-SOURCE
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Manuals and User Guides for Teledyne Lecroy QPHY-DP2-SOURCE. We have
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Teledyne Lecroy QPHY-DP2-SOURCE manual available for free PDF download: Instruction Manual
Teledyne Lecroy QPHY-DP2-SOURCE Instruction Manual (96 pages)
DisplayPort 2.1/1.4 SOURCE Compliance Test Software
Brand:
Teledyne Lecroy
| Category:
Measuring Instruments
| Size: 8 MB
Table of Contents
Table of Contents
3
About this Manual
5
Introduction
7
Qphy-Dp2-Source
7
Software Installation and Setup
8
Installing Qualiphy Application
8
Activate Components in MAUI
8
Install Third-Party Software
8
Set up Secondary Display (Optional)
9
Set up the Qualiphy Application
9
Connection Tab
10
Set up Remote Control (Optional)
12
Displayport 2.1/1.4 SOURCE (Tx) Test MOI Required Equipment
13
Required Software
14
Recommended Software
14
Displayport 2.1/1.4 SOURCE (Tx) Measurements
15
Figure 1. Test Point Definition
15
Displayport 2.1/1.4 Multi-Lane Test Setup
17
Figure 2. DP2.1/1.4 SOURCE Test Connection Diagram
17
Figure 3. Connection Diagram for Four-Lane Testing Using the RC-8SPDT-A18 RF Switch
19
Automated Device Control
20
TPA and Test Cable De-Embedding (Optional)
22
Figure 4. 4-Port S-Parameter Indicators for TX Testing
23
Initiating Displayport 2.1/1.4 SOURCE Test Sessions
24
Displayport 2.1 SOURCE 128B/132B Tests
26
Figure 5. Screen and Report for 4.2 128B/132B Presetbest, and Ctle/Dfebest Test
28
Figure 6. Screen and Report for 4.3 128B/132B Transmitter Equalization Test
29
Figure 7. Screen and Report for 4.4 128B/132B SSC Unit Interval Min/Max Test
30
Figure 8. Screen and Report for 4.5 128B/132B SSC down Spread Range Test
31
Figure 9. Report for SSC down Spread Rate Test
32
Figure 10. Screen and Report for 4.5 128B/132B SSC Phase Deviation Test
32
Figure 11. Screen and Report for 4.5 128B/132B SSC Slew Rate Test
33
Figure 12. Test Setup for 4.6 128B/132B Retimer Frequency Variation Test
34
Figure 13. Screen and Report for 4.6 128B/132B TX Frequency Variation Test
36
Figure 14. Screen and Report for 4.7 128B/132B TP2 Eye Test
37
Figure 15. Screen and Report for 4.8 128B/132B TP2 Jitter Tests
38
Figure 16. Screen and Report for 4.9 128B/132B AC Common Mode Test
39
Figure 17. Screens and Report for 4.10 128B/132 TP3_EQ Eye Mask Test
40
Figure 18. Screen and Report for 4.11 128B/132B Jitter Tests
41
Displayport 2.1 SOURCE 128B/132B Test Variables
42
Displayport 2.1 SOURCE 128B/132B Test Limits
48
Displayport 2.1/1.4 SOURCE 8B/10B Tests
49
Figure 19. Screen for TP3_CTLE EYE Test
49
Figure 20. Screens for 3.1 8B/10B Eye Diagram Test
50
Figure 21. Screen for 3.2 8B/10B HBR/RBR Non-PE Level Test
51
Figure 22. Screen for 3.3 8B/10B HBR/RBR PE Level Test
52
Figure 23. Screen for 3.4 8B/10B HBR3/HBR2 PE Level and Equalization Test
53
Figure 24. Report for 3.5 8B/10B HBR3/HBR2 Vtx-Diff-Pk-Pk Max Test
53
Figure 25. Screen for 3.6 8B/10B Inter-Pair Skew Test
54
Figure 26. Screen for 3.7 8B/10B Intra-Pair Skew Test
55
Figure 27. Screen for 3.8 8B/10B AC Common Mode Test
56
Figure 28. Screen for 3.9 8B/10B Non-ISI Jitter Test
57
Figure 29. Screen for 3.11.1 8B/10B Jitter Test
58
Figure 30. Screen for 3.11.2 8B/10B Jitter
59
Figure 31. Screen for 3.11.3 8B/10B Jitter Test
60
Figure 32. 3.12 8B/10B Main Link Frequency Tests
60
Figure 33. 3.12 8B/10B SSC Modulation Frequency Test
61
Figure 34. Screen for 3.12 8B/10B SSC Measurements
61
Displayport 2.1/1.4 SOURCE 8B/10B Test Variables
62
Appendix A: Using Host Program
66
Displayport 2.1/1.4 SOURCE 8B/10B Test Limits
68
DP-AUX aux Tx Test MOI
69
AUX Channel Tx Measurements
69
AUX Channel Tx Test Setup
69
Figure 35. Connection Diagram for 11.1 aux Slew Rate and 11.5 aux Eye Tests
69
Figure 36. Screen for 11.1 aux EYE Test
70
Figure 37. Screen for 11.5 aux Channel Slew Rate Test
71
Using Qualiphy
72
Qualiphy Test Process
72
Generating Reports
73
Figure 38. Qualiphy Report Summary Page
73
Customizing Qualiphy
74
Copy Configuration
74
Select Tests
75
Edit Variables
75
X-Replay Mode
78
Using Host Program Control Mode
79
Preparing Special Configuration for Host Control Mode
79
Host Program Elements Needed to Control the Qualiphy Script
80
HPC Sync File
83
Appendix A: Testing Displayport 2.1 SOURCE Return Loss (Informative)
85
Required Test Equipment
85
Displayport 2.1 Tx Return Loss Test Procedure
85
Appendix B: Using DP-AUX TDMP to Verify/Debug DPCD Register Settings
87
Appendix B: Using DP-AUX TDMP to Verify/Debug DPCD
87
Appendix C: Using SDAX-DP to Identify Best Preset and CTLE
91
Best
91
Finding CTLE_DFE BEST at TP3
93
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