ST UPSD3212CV Manuals

Manuals and User Guides for ST UPSD3212CV. We have 1 ST UPSD3212CV manual available for free PDF download: User Manual

ST UPSD3212CV User Manual

ST UPSD3212CV User Manual (163 pages)

Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic

Brand: ST | Category: Computer Hardware | Size: 2 MB

Table of Contents

Features Summary

1
- Table of Contents
  3
Summary Description

7
52-Pin Package I/O Port

12
Architecture Overview

13
- Memory Organization
  13
- Registers
  14
- Program Memory
  15
- Data Memory
  15
- Ram
  15
- Xram-Psd
  15
- Sfr
  16
- Addressing Modes
  16
- Arithmetic Instructions
  17
- Logical Instructions
  18
- Data Transfers
  20
- Boolean Instructions
  23
- Relative Offset
  23
- Jump Instructions
  24
- Machine Cycles
  25
Upsd3200 HARDWARE DESCRIPTION

27
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  27
Mcu Module Discription

28
- Special Function Registers
  28
Interrupt System

34
- External Int0
  34
- Timer 0 and 1 Interrupts
  34
- Timer 2 Interrupt
  34
- I 2 C Interrupt
  34
- External Int1
  34
- USB Interrupt
  34
- USART Interrupt
  36
- Interrupt Priority Structure
  36
- Interrupts Enable Structure
  36
- How Interrupts Are Handled
  38
Power-Saving Mode

39
- Idle Mode
  39
- Power-Down Mode
  39
- Power Control Register
  39
I/O PORTS (MCU Module)

40
- PORT Type and Description
  42
Oscillator

44
Supervisory

45
- External Reset
  45
- Low VDD Voltage Reset
  45
- Watchdog Timer Overflow
  45
- USB Reset
  45
Watchdog Timer

46
Timer/Counters (Timer 0, Timer 1 and Timer 2)

48
- Timer 0 and Timer 1
  48
- Timer 2
  51
Standard Serial Interface (Uart)

55
- Multiprocessor Communications
  55
- Serial Port Control Register
  56
Analog-To-Digital Convertor (Adc)

65
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  65
  - ADC Interrupt
    65
Pulse Width Modulation (Pwm)

67
I 2 C Interface

72
1 I C Interface

74
Usb Hardware

76
- USB Related Registers
  76
- Transceiver
  83
- Receiver Characteristics
  85
- External USB Pull-Up Resistor
  86
Psd Module

88
- Functional Overview
  88
- In-System Programming (ISP)
  90
Development System

91
Psd Module Register Description and Address Offset

92
Psd Module Detailed Operation

93
Memory Blocks

93
- Primary Flash Memory and Secondary Flash Memory Description
  93
- Memory Block Select Signals
  93
- Instructions
  94
- Power-Down Instruction and Power-Up Mode
  96
- Read
  96
- Programming Flash Memory
  98
- Erasing Flash Memory
  100
- Specific Features
  101
- Sram
  102
- Sector Select and SRAM Select
  102
- Page Register
  105
Plds

106
- The Turbo Bit in PSD MODULE
  106
- Decode PLD (DPLD)
  108
- Complex PLD (CPLD)
  109
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  109
- Output Macrocell (OMC)
  110
- Product Term Allocator
  111
- Input Macrocells (IMC)
  112
I/O Ports (Psd Module)

113
- General Port Architecture
  113
- Port Operating Modes
  114
- MCU I/O Mode
  114
- PLD I/O Mode
  114
- Address out Mode
  114
- Peripheral I/O Mode
  114
- JTAG In-System Programming (ISP)
  114
- Port Configuration Registers (PCR)
  116
- Port Data Registers
  117
- Ports a and B - Functionality and Structure
  118
- Port C - Functionality and Structure
  119
- Port D - Functionality and Structure
  120
- External Chip Select
  121
Power Management

122
- PLD Power Management
  124
- PSD Chip Select Input (CSI, PD2)
  124
- Input Clock
  124
- Input Control Signals
  124
Reset Timing and Device Status at Reset

126
- Warm RESET
  126
- I/O Pin, Register and PLD Status at RESET
  126
Programming In-Circuit Using the Jtag Serial Interface

127
- Standard JTAG Signals
  127
- JTAG Extensions
  127
- Security and Flash Memory Protection
  127
Initial Delivery State

127
Ac/DC Parameters

128
Maximum Rating

130
Emc Characteristics

131
DC and Ac Parameters

133
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  133
Package Mechanical Information

157
Part Numbering

161
Revision History

162

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