ST STEVAL-WBC2TX50 Manuals

Manuals and User Guides for ST STEVAL-WBC2TX50. We have 1 ST STEVAL-WBC2TX50 manual available for free PDF download: User Manual

ST STEVAL-WBC2TX50 User Manual (84 pages)

wireless power transmitter evaluation board

Brand: ST | Category: Motherboard | Size: 15 MB

Figure 1. STEVAL-WBC2TX50 Evaluation Board
1
Getting Started
2
Reference Design Specifications
3
Table 1. Reference Design Specifications
3
Overview of the Board
4
Figure 2. Board Overview
4
Test Points
6
Figure 3. Test Points
6
Table 2. Test Points
6
Basic Operating Modes
7
Status Leds
7
Table 3. Status Leds Meaning
7
Device Description and Operation
8
System Block Diagram
8
Power Inverter
8
Adc
8
Figure 4. Block Diagram
8
Bridge Voltage Monitor
9
DC-DC Current Monitor
9
Bridge Current Monitor
9
Ring Voltage Monitor
9
Onboard Voltage Sources
9
DC-DC Buck Converter
9
The 3.3 V LDO
9
The 1.8 V LDO
9
Voltage Doubler
9
Power up Sequence
10
Uvlo
10
Chip Reset
10
Protections Overview
10
Main Overcurrent Protection (OCP)
10
Overvoltage Protection (OVP)
10
Voltage Drop
11
RX Overvoltage Protection - Static/Dynamic OVP, Currentdrop OVP
11
Overtemperature Protection (OVTP)
11
Ntc
11
Qfod
11
Foreign Object Detection (FOD)
11
Presence Detection
11
Comparing to Reference Q Factor
12
Power Balance
12
EPT Reason
12
WPC Qi Wireless Power Transfer
12
Baseline and Extended Power Profiles
12
Figure 5. Difference between BPP and EPP Power Transfer Startup
13
Wireless Power Interface
14
Bidirectional Communication
14
ASK Communication
14
Figure 6. ASK Modulation
15
Figure 7. ASK Timing
15
Figure 8. Example of Bit Encoding
15
FSK Communication
16
Figure 9. Example of Byte Encoding
16
Most Common Qi Communication Packets
17
Figure 10. Format of the Three Defined Messages
17
Stlink
18
STLINK Drivers
18
Stm32Cube Programmer
18
Firmware Flash Programming
19
Figure 11. STLINK Parameters
19
Figure 12. Programming the Chip
19
Uart
20
UART Configuration
20
Firmware Update Without GUI
20
Figure 13. Bootloader Start
20
Table 4. Switch to Boot Mode
21
Table 5. Init in Bootloader
21
Table 6. Get Command
21
Table 7. Memory Erase Command
22
Table 8. Memory Write Command
22
Bootloader and Boot Pin
23
Stsafe
23
STSAFE-A110 for Qi Authentication
23
Table 9. Calibration Command
23
The Qi Authentication Procedure
24
Figure 14. the Certificate Chain Process
24
Figure 15. the Authentication Process
24
STSAFE-A110 Test Profile for STEVAL-WBC2TX50
25
Table 10. STSAFE-A110 Certificate Chain Elements
25
How to Acquire Official STSAFE-A110 Samples
26
Fan Support
26
Graphical User Interface (GUI)
27
Connecting STWBC2 to the GUI
27
Figure 16. the Initial State of the GUI
27
Info Page
28
Status Semaphore
28
Figure 17. Port Selection
28
Figure 18. Status Semaphore
28
Event Box
29
Figure 19. Event Box
29
Table 11. Available Events
30
Device Metrics
33
Figure 20. Device Metrics
33
Figure 21. Input Power Supply Indication
33
Tx Information
35
Rx Information
35
Figure 22. Device Information
35
Figure 23. Rx Identification Data
35
Charts Page
36
Chart Controls and Shortcuts
36
Parameters Page
36
Figure 24. Example of Captured Charts
36
Table 12. Chart Controls and Shortcuts
36
Configuration File
37
Device Parameters
37
Figure 25. Save and Load Buttons
37
Table 13. List of Configurable Parameters
37
Read/Write to Device
40
Traces Page
40
Using Traces for FOD Tuning Data Collection
40
Figure 26. Read and Write Operation Buttons
40
Figure 27. Save Button, Choosing of Saved Data Type and Save Dialog
40
FW Page
41
Obtaining the Firmware Update File
41
Loading the Firmware into an Empty Device
41
Updating Firmware of a Previously Programmed Device
41
Calibration
41
Recommended Flow of Prototyping and Production
42
Protection Tuning
42
Foreign Object Detection
42
Static OVP
42
Figure 28. Test Points
42
Dynamic OVP
43
Current Drop OVP
43
Ring Node Overvoltage
43
STEVAL-WBC2TX50 Description
44
Schematic Diagrams
44
Figure 29. STEVAL-WBC2TX50 Circuit Schematic (1 of 6)
44
Figure 30. STEVAL-WBC2TX50 Circuit Schematic (2 of 6)
45
Figure 31. STEVAL-WBC2TX50 Circuit Schematic (3 of 6)
46
Figure 32. STEVAL-WBC2TX50 Circuit Schematic (4 of 6)
47
Figure 33. STEVAL-WBC2TX50 Circuit Schematic (5 of 6)
47
Figure 34. STEVAL-WBC2TX50 Circuit Schematic (6 of 6)
48
Bill of Materials (BOM)
49
Table 14. STEVAL-WBC2TX50 BOM
49
Component Assembly
54
Figure 35. Component Assembly
54
STEVAL-WBC2TX50 PCB Layout
55
Figure 36. PCB Top Layer
55
Figure 37. PCB Inner1 Layer
55
Figure 38. PCB Inner2 Layer
56
Figure 39. PCB Bottom Layer
56
STWBC2 Default Configuration
57
Table 15. Basic Parameters
57
Typical Performance Characteristics
58
Power-Up Waveforms
58
Figure 40. Device Power up
58
Analog and Digital Ping
59
Figure 41. Analog and Digital Ping
59
Startup of EPP
60
Efficiency and Spatial Freedom in the XY Plane
60
Figure 42. Startup of EPP
60
Figure 43. Setup for Offset Test
61
Figure 44. X-Axis Offset Impact on Efficiency
61
Efficiency and Spatial Freedom in the Z-Axis
62
Figure 45. Y-Axis Offset Impact on Efficiency
62
Figure 46. Z-Axis Offset Impact on Efficiency
62
Thermal Performance
63
Figure 47. Thermal Performance
63
Designing a Wireless Power Transmitter Based on STEVAL-WBC2TX50
64
Evaluation Board
64
BOM Reduction Suggestions
64
Layout Guidelines
64
High Power Tracks
64
Figure 48. Layer 1 High Power Tracks
64
Ground Plane on Layer 4
65
Figure 49. Layer 4 GND
65
Board Input Layout
66
Figure 50. Placement of Input Connectors, Filtering, and Protections
66
VIN, Vbuck, and Vdoubler
67
Figure 51. Larger Tracks of DC-DC Buck, VIN
67
Figure 52. Green: DC-DC Buck Placement. Yellow: Capacitors Close to STWBC2 IC
68
VIN ISNS Routing
69
Figure 53. VIN ISNS Routing
69
DC-DC Boost Circuit
70
Main Bridge Circuit
70
Figure 54. DC-DC Boost Circuit Routing
70
Figure 55. Main Bridge Circuit
70
Bridge ISNS Routing
71
Gate Drivers Routing
71
DC-DC Short Circuit
71
Q Factor Driver
71
Figure 56. Bridge ISNS Routing
71
Figure 57. DC-DC Short Path through Q404
71
Board Versions
72
Table 16. STEVAL-WBC2TX50 Versions
72
Regulatory Compliance Information
73
References
74
Acronyms and Definition
75
Table 17. List of Acronyms
75
Revision History
76
Table 18. Document Revision History
76

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