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UNIVAC 9200 Series
Sperry Rand UNIVAC 9200 Series Manuals
Manuals and User Guides for Sperry Rand UNIVAC 9200 Series. We have
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Sperry Rand UNIVAC 9200 Series manual available for free PDF download: Programmer's Reference Manual
Sperry Rand UNIVAC 9200 Series Programmer's Reference Manual (108 pages)
PROCESSOR AND STORAGE
Brand:
Sperry Rand
| Category:
Storage
| Size: 4 MB
Table of Contents
Table of Contents
4
General
6
System Configuration
12
Component Description
17
Main Storage
17
Control
17
Arithmetic
17
Multiply, Divide, and Edit
17
1.3.2. Subtraction by Two's Complement Method
18
Input/Output
19
Multiplexer Channel
19
1.4.2. Selector Channel
20
Print Positions
21
Print Position Expansion
21
Variable Speed Printing
21
LPI Print Spacing
21
Form Alignment
21
High Speed Numeric Print
21
Data Formats and Codes
22
Hexadecimal Representation
23
Hexadecimal-Decimal Conversion
23
Decimal Number Representation
24
Sign Bits
24
Character Representation
25
Parity Verification
25
OP Codes
25
Logical Information
25
Processor Unit
27
Main Storage
27
Privileged and Low Order Storage
27
Storage Boundaries
28
Parity Checking
29
Interrupts
29
Processor Control
30
Program State Control
32
Processor Program State Control Words (Bytes 0-3)
32
Input/Output Program State Control Word (Bytes 16-19)
33
Restricted Alter/Display and Operator Request (Bytes 4,5)
33
Machine Instruction Register (Bytes 6-11)
33
Restart Instruction Register (Bytes 22-25)
34
Special Status (Bytes 29-31)
34
Processor Program Register (Bytes 32-47) and Input/Output Program
34
Device Status (Byte 66) and Device Address (Byte 67)
34
Buffer Control Words (Bytes 68-127)
35
Multiplexer Subchannel BCW
35
Device Control Subchannel Numbering
35
Buffer Control Word Location
35
Additional Nonshared Subchannel Device Addresses
36
Printer Image Area (Bytes 128-259)
36
Printer Control
36
Printer Instructions
36
Printer Buffer Control Word
37
Issue and Execute
38
Status Register
38
Interrupt Requests
39
Printer Status Byte
39
Input/Output Control
40
Operator-Initiated Functions
41
Load Cycle
41
Alternate Execute and Staticize Cycle
41
Multiplexer Channel Control
41
Multiplexer Channel Instructions
42
Multiplexer Channel Buffer Control Word
42
Multiplexer Channel Status Byte
43
Condition Code
43
Alternate BCW Format
44
Data Direction Control
45
Polling
45
Priority of Interrupt
46
Special Channel Instructions and Interrupts
46
Operator Interrupt
46
Alternate (LT) Summary Interrupt
46
One-Second Interrupt
46
Summary of Special Channel Instructions
47
Channel Checking
48
Interface Error FI Ip-Flop
48
Device Address Parity
48
Parity Error Flip-Flop
48
Selector Channel Control
49
Channel Addressing
49
Selector Channel Address Format
49
Mu Itip Lexer Channel Address Format
49
Processor Lock-Out
49
Concurrent Operations
50
Command Chaining
50
J. Execute I/O and Test I/O Instructions
50
I/O Commands
51
Transfer-In-Channel (TIC) Command
51
Condition Code (CC)
52
Channel Address Word (CAW) and Diagnostic Interrupt
52
Device Status
54
Channel Status Word (CSW)
56
Channel Checking
56
Special Selector Channel Instructions
57
Data Translation
57
Card Code Translation (SO-Column Card)
57
Card Code Image Mode (SO-Column Card)
58
2.1. Card Code Image Mode (90-Column Card)
58
Internal Codes
60
Instructions
61
General
61
Instruction Mnemonics in Alphabetical Sequence
62
Instructions Grouped by Functional Type
63
Instructions Grouped by Format
64
Instructions in Sequence of Hexadecimal Codes
65
Instruction Format
66
Register and Indexed Storage Operation (RX)
66
Storage and Immediate Operand Operation (SI)
66
Storage-To-Storage (SS1)
66
Storage-To-Storage (SS2)
67
Instruction Repertoire
67
Decimal Instructions
67
Branch Instructions
67
Store Halfword Instructions (STH)
69
Load Halfword Instruction (LH)
69
Compare Halfword Instruction (CH)
69
Add Immediate Instruction (AI)
69
Add Halfword Instruction (AH)
70
Subtract Halfword Instruction (SH)
70
Logical Instructions
70
Test under Mask Instruction (TM)
70
AND Immediate Instruction (NI)
70
Compare Logical Immediate Instruction (CLI)
70
OR Immediate Instruction (01)
71
Halt and Proceed Instruction (HPR)
71
Move Numeric Instruction (MVN)
71
Move Character Instruction (MVC)
71
AND Character Instruction (NC)
71
Compare Logical Character Instruction (CLC)
71
Translate Instruction (TR)
72
Edit Instruction (ED)
72
Move with Offset Instruction (MVO)
73
Pack Instruction (PACK)
74
Unpack Instruction (U N PK)
75
Zero Add (Packed) Decimal Instruction (ZAP)
75
Compare (Packed) Decimal Instruction (CP)
75
ADD (Packed) Decimal Instruction (AP)
75
Subtract (Packed) Decimal Instruction (SP)
76
Multiply (Packed) Decimal Instruction (MP)
76
Branch-On-Condition Instruction (BC)
80
Branch and Link Instruction (BAL)
80
State Control (Privileged and Special) Instructions
80
Load Program State Control Instruction (LPSC)
80
Store Program State Control Instruction (SPSC)
81
Supervisor Request Call Instruction (SRC)
81
Input/Output Instruction
81
Execute I/O Instruction (XIOF)
81
Test I/O Instruction (TID)
81
Appendixes
83
Instructions, Formats, Codes
83
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