Download Print this page

Sperry Rand UNIVAC 9200 Series Programmer's Reference Manual

Processor and storage

Hide thumbs

page of 108

/ 108
Contents
Table of Contents
Bookmarks

Table of Contents

Table of Contents
General
System Configuration
Component Description
Main Storage
Control
Arithmetic
Multiply, Divide, and Edit
1.3.2. Subtraction by Two's Complement Method
Input/Output
Multiplexer Channel
1.4.2. Selector Channel
Print Positions
Print Position Expansion
Variable Speed Printing
LPI Print Spacing
Form Alignment
High Speed Numeric Print
Data Formats and Codes
Hexadecimal Representation
Hexadecimal-Decimal Conversion
Decimal Number Representation
Sign Bits
Character Representation
Parity Verification
OP Codes
Logical Information
Processor Unit
Main Storage
Privileged and Low Order Storage
Storage Boundaries
Parity Checking
Interrupts
Processor Control
Program State Control
Processor Program State Control Words (Bytes 0-3)
Input/Output Program State Control Word (Bytes 16-19)
Restricted Alter/Display and Operator Request (Bytes 4,5)
Machine Instruction Register (Bytes 6-11)
Restart Instruction Register (Bytes 22-25)
Special Status (Bytes 29-31)
Processor Program Register (Bytes 32-47) and Input/Output Program
Device Status (Byte 66) and Device Address (Byte 67)
Buffer Control Words (Bytes 68-127)
Multiplexer Subchannel BCW
Device Control Subchannel Numbering
Buffer Control Word Location
Additional Nonshared Subchannel Device Addresses
Printer Image Area (Bytes 128-259)
Printer Control
Printer Instructions
Printer Buffer Control Word
Issue and Execute
Status Register
Interrupt Requests
Printer Status Byte
Input/Output Control
Operator-Initiated Functions
Load Cycle
Alternate Execute and Staticize Cycle
Multiplexer Channel Control
Multiplexer Channel Instructions
Multiplexer Channel Buffer Control Word
Multiplexer Channel Status Byte
Condition Code
Alternate BCW Format
Data Direction Control
Polling
Priority of Interrupt
Special Channel Instructions and Interrupts
Operator Interrupt
Alternate (LT) Summary Interrupt
One-Second Interrupt
Summary of Special Channel Instructions
Channel Checking
Interface Error FI Ip-Flop
Device Address Parity
Parity Error Flip-Flop
Selector Channel Control
Channel Addressing
Selector Channel Address Format
Mu Itip Lexer Channel Address Format
Processor Lock-Out
Concurrent Operations
Command Chaining
J. Execute I/O and Test I/O Instructions
I/O Commands
Transfer-In-Channel (TIC) Command
Condition Code (CC)
Channel Address Word (CAW) and Diagnostic Interrupt
Device Status
Channel Status Word (CSW)
Channel Checking
Special Selector Channel Instructions
Data Translation
Card Code Translation (SO-Column Card)
Card Code Image Mode (SO-Column Card)
2.1. Card Code Image Mode (90-Column Card)
Internal Codes
Instructions
General
Instruction Mnemonics in Alphabetical Sequence
Instructions Grouped by Functional Type
Instructions Grouped by Format
Instructions in Sequence of Hexadecimal Codes
Instruction Format
Register and Indexed Storage Operation (RX)
Storage and Immediate Operand Operation (SI)
Storage-To-Storage (SS1)
Storage-To-Storage (SS2)
Instruction Repertoire
Decimal Instructions
Branch Instructions
Store Halfword Instructions (STH)
Load Halfword Instruction (LH)
Compare Halfword Instruction (CH)
Add Immediate Instruction (AI)
Add Halfword Instruction (AH)
Subtract Halfword Instruction (SH)
Logical Instructions
Test under Mask Instruction (TM)
AND Immediate Instruction (NI)
Compare Logical Immediate Instruction (CLI)
OR Immediate Instruction (01)
Halt and Proceed Instruction (HPR)
Move Numeric Instruction (MVN)
Move Character Instruction (MVC)
AND Character Instruction (NC)
Compare Logical Character Instruction (CLC)
Translate Instruction (TR)
Edit Instruction (ED)
Move with Offset Instruction (MVO)
Pack Instruction (PACK)
Unpack Instruction (U N PK)
Zero Add (Packed) Decimal Instruction (ZAP)
Compare (Packed) Decimal Instruction (CP)
ADD (Packed) Decimal Instruction (AP)
Subtract (Packed) Decimal Instruction (SP)
Multiply (Packed) Decimal Instruction (MP)
Branch-On-Condition Instruction (BC)
Branch and Link Instruction (BAL)
State Control (Privileged and Special) Instructions
Load Program State Control Instruction (LPSC)
Store Program State Control Instruction (SPSC)
Supervisor Request Call Instruction (SRC)
Input/Output Instruction
Execute I/O Instruction (XIOF)
Test I/O Instruction (TID)
Appendixes
Instructions, Formats, Codes

Quick Links

Download this manual

PROGRAMMEF~

REFEREN

PROCESSOR

AND

STORAGE

UP-7546 Rev. 1

Table of Contents

Need help?

Do you have a question about the UNIVAC 9200 Series and is the answer not in the manual?

Questions and answers

This manual is also suitable for:

Univac 9300 series

Sperry Rand UNIVAC 9200 Series Programmer's Reference Manual

Quick Links

Need help?

Questions and answers

Related Manuals for Sperry Rand UNIVAC 9200 Series

Related Products for Sperry Rand UNIVAC 9200 Series

This manual is also suitable for:

Table of Contents