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IDAN-FPGA35S6046HR
User Manuals: rtd IDAN-FPGA35S6046HR Development Board
Manuals and User Guides for rtd IDAN-FPGA35S6046HR Development Board. We have
1
rtd IDAN-FPGA35S6046HR Development Board manual available for free PDF download: User Manual
rtd IDAN-FPGA35S6046HR User Manual (37 pages)
FPGA Module
Brand:
rtd
| Category:
Control Unit
| Size: 1 MB
Table of Contents
Table of Contents
4
1 Introduction
7
Product Overview
7
Board Features
7
Ordering Information
9
Contact Information
9
Sales Support
9
Technical Support
9
Table 1: Ordering Options
9
2 Specifications
10
Operating Conditions
10
Electrical Characteristics
10
Table 2: Operating Conditions
10
Table 3: Electrical Characteristics
10
3 Board Connection
11
Board Handling Precautions
11
Physical Characteristics
11
Figure 1: Board Dimensions
11
Connectors and Jumpers
12
External I/O Connectors
12
CN3: Xilinx JTAG Programming Header
12
Figure 2: Board Connections
12
Table 4: CN3 Programming Header
12
CN8: High Speed Digital I/O Connector
13
Table 5: CN8 I/O Pin Assignments
13
CN9: Digital I/O Connector
14
CN10, CN11, CN12, CN13: RS-232/422/485 Transceiver Connectors
14
Table 6: CN9 I/O Pin Assignments
14
Table 7: CN10, CN11, CN12, CN13 I/O Pin Assignments
14
Bus Connectors
15
Cn1(Top) & CN2(Bottom): Pcie Connector
15
Jumpers
15
JP4, JP5, JP6: Pull Up/Pull down Jumper
15
JP1: Embedded Programmer Enable
15
JP8: User ID Jumper
15
Solder Jumper
15
B2: Pull up Voltage
15
Table 8: Pull Up/Pull down Jumper Options
15
Table 9: JP1 - Embedded Programmer Enable
15
Steps for Installing
16
Figure 3: Example 104™Stack
16
4 IDAN Connections
17
Module Handling Precautions
17
Physical Characteristics
17
Figure 4: IDAN Dimensions
17
Connectors and Jumpers
18
P2: RS-232/422/485 Transceiver Connector
18
P3: Digital I/O Connector
18
Table 12: P2 Pin Assignments
18
Table 13: P3 Pin Assignments
19
P4: High Speed Digital I/O Connector
20
Table 14: P4 Pin Assignments
20
Bus Connectors
22
Cn1(Top) & CN2(Bottom): Pcie Connector
22
Jumpers
22
JP4, JP5, JP6: Pull Up/Pull down Jumper
22
JP1: Embedded Programmer Enable
22
JP8: User ID Jumper
22
Solder Jumper
22
B2: Pull up Voltage
22
Table 15: Pull Up/Pull down Jumper Options
22
Table 16: JP1 - Embedded Programmer Enable
22
Steps for Installing
23
Figure 5: Example IDAN System
23
5 Functional Description
24
Configuration Flash
24
Oscillator
24
Eeprom
24
Figure 6: FPGA35S6 Block Diagram
24
Figure 7: CN9 Digital I/O Circuitry
25
Figure 8: Serial Port Transceiver
25
Table 19: Transceiver Configuration
26
Table 20: Identifying the FPGA35S6
27
Table 21: FPGA Example Register Map
27
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