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RFX144V24-S23
User Manuals: Rockwell RFX144V24-S23 Modem
Manuals and User Guides for Rockwell RFX144V24-S23 Modem. We have
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Rockwell RFX144V24-S23 Modem manual available for free PDF download: Designer's Manual
Rockwell RFX144V24-S23 Designer's Manual (198 pages)
MONOFAX Modems
Brand:
Rockwell
| Category:
Modem
| Size: 1 MB
Table of Contents
Table of Contents
3
1 Introduction
9
Table 1-1. Modem Models and Supported Features
10
Features
11
Technical Specifications
13
Table 1-2. Configurations, Signaling Rates, and Data Rates
14
Table 1-3. Turn-On Sequence Times
15
Table 1-4. Turn-Off Sequence Times
15
Table 1-5. V.23 Default Turn-On and Turn-Off Sequences
16
2 Hardware Interface Signals
17
Figure 2-1. Modem Functional Interconnect Diagram
18
Figure 2-2. MDP Pin Signals - 100-Pin PQFP
19
Table 2-1. MDP Pin Signals - 100-Pin PQFP
20
Figure 2-3. XIA Pin Signals - 28-Pin PLCC
21
Table 2-2. XIA Pin Signals - 28-Pin PLCC
21
Table 2-3. MDP Hardware Interface Signal Definitions
22
Table 2-4. XIA Hardware Interface Signal Definitions
27
Table 2-5. Digital Electrical Characteristics
28
Table 2-6. Analog Electrical Characteristics
29
Table 2-7. Current and Power Requirements
30
Table 2-8. Absolute Maximum Ratings
30
Figure 2-4. Microprocessor Interface Waveforms
31
Figure 2-5. Transmitter Signal Timing
32
Figure 2-6. Receiver Signal Timing
32
Table 2-9. Microprocessor Interface Timing
32
Figure 2-7. Eye Pattern Timing
33
Figure 2-8. Eye Pattern Circuit
34
3 Software Interface
35
Interface Memory
35
Interface Memory Map
35
Interface Memory Bit Definitions
35
Figure 3-1. Interface Memory Map
36
Table 3-1. Interface Memory Bit Definitions
37
Software Interface Considerations
53
Parallel Data Transfer
53
Programmable Interrupt Feature
53
Figure 3-2. Parallel Data Transfer Routine
54
8-Bit Audio Mode Operation
55
DTMF Receiver
56
Figure 3-3. DTMF Receiver Status Bit Timing
56
FSK 7E Flag Detector
57
Figure 3-4. FSK 7E Flag Detector Timing
57
Mode Operation
58
Caller ID Mode Operation
58
Figure 3-5. V.23 Modes Setup Procedure
59
High Speed Timing
60
Figure 3-6. Caller ID Mode Setup Procedure
60
Table 3-2. High Speed Status Bit Timing
60
Figure 3-7. High Speed Mode Status Bit Timing
61
Power-On/Reset DSP Test Mode and Crystal Selection
63
Table 3-3. Power-On Reset Self-Test Values
63
4 Dsp Ram Access
65
Interface Memory Access to Dsp Ram
65
Host Programmable Data
65
Host DSP RAM Read and Write Procedures
65
DSP RAM Read Procedure
65
DSP RAM Write Procedure
66
Table 4-1. Modem DSP RAM Access Codes
67
Table 4-2. Modem DSP RAM Access Codes - SBRAM
68
Figure 4-1. Host Flowchart - RAM Data Read and RAM Data Write
69
Diagnostic Data Scaling
70
5 Hdlc Framing
83
Hdlc Frames
83
Frame Fields
83
Figure 5-1. HDLC Frame
83
Frame Abortion, Frame Idle, and Time Fill
84
Figure 5-2. CRC Polynomial Implementation
84
Implementation
85
Figure 5-3. HDLC Process
85
Figure 5-4. HDLC Signals Timing
86
Mode Selection
87
Table 5-1. Transmitter and Receiver Initialization
87
Transmission and Reception Rate
87
Transmitter and Receiver Initialization
87
Flag Transmission and Reception
88
Information Field Transmission and Reception
88
FCS and Ending Flag Transmission and Reception
89
Transmit Mode Control
90
Underrun and Overrun Conditions
90
Example Application
90
6 Tone Detector Filter Tuning
93
Programmable Tone Detectors
93
Computation of Tone Detector Coefficients
93
Energy Averaging Filter
93
Figure 6-1. Modem Tone Detection Diagram
93
Figure 6-2. Typical Single Filter Response
96
Figure 6-3. Typical Cascade Filter Response
96
Figure 6-4. Z-Plane Pole-Zero Diagram
97
Figure 6-5. Bandwidth and Offset Frequencies
98
Figure 6-6. Alpha-Zero Center Frequency
98
Filter Coefficients
99
Tone Detectors in Voice Codec, Audio Codec and Audio Modes
99
Table 6-1. Filter Coefficient RAM Access Codes
99
Table 6-2. Calculated Coefficient Values, 9600 Hz Sample Rate
100
Table 6-3. Calculated Coefficient Values, 8000 Hz Sample Rate
101
Table 6-4. Calculated Coefficient Values, 4000 Hz Sample Rate
102
7 Dtmf Dialing with Auto Dialer
103
Dtmf Requirements
103
Setting Oscillator Parameters
103
Table 7-1. DTMF Signals
103
Detecting Answer Tone
104
Complete Calling Sequence
104
Table 7-2. DTMF Parameters
105
Single Tone Generation
106
Table 7-3. Common Single Tone Parameters
106
Figure 7-1. Autodialer Flowchart
107
8 Voice Codec and Audio Codec Modes with Room Monitor
111
Voice Encoder and Audio Encoder
111
Figure 8-1. Encoder Implementation
112
Encoder Automatic Gain Control (AGC)
113
End of Message Detection
113
Voice and Audio Activated Message Encoding
113
Figure 8-2. AGC Operation
114
Figure 8-3. AGC Implementation
115
Figure 8-4. AGC Implementation
116
Figure 8-5. AGC Parameters Operating Envelope
117
Voice Decoder and Audio Decoder
119
Figure 8-6. Decoder Implementation
120
Error Correction Coding and Aram Message Storage
121
Room Monitor
121
Tone Detection
122
9 Implementation
123
General
123
Phase a
123
Figure 9-1. Basic Block Diagram of G3 Facsimile
124
Figure 9-2. G3 Facsimile Procedure
124
Figure 9-3. Transmit Calling Tone (CNG) (1100 Hz)
125
Figure 9-4. Detecting CNG Tone (1100 Hz)
126
Figure 9-5. Transmit Called Tone (CED) (2100 Hz)
127
Figure 9-6. Detecting CED Tone (2100 Hz)
128
Figure 9-7. HDLC Frame Structure
129
Phase B
130
Phase C
130
Phase D
130
Phase E
130
Flowcharts
130
Figure 9-8. Phase C Format
132
Figure 9-9. Transmit FSK/HDLC Signals
133
Figure 9-10. Setup for Programmable Interrupt
134
Figure 9-11. Low Speed Configuration Subroutine
135
Figure 9-12. Transmit Preamble
136
Figure 9-13. Low Speed Interrupt-Driven Transmit
137
Figure 9-14. Receive FSK/HDLC Signals
138
Figure 9-15. Low Speed Interrupt-Driven Receive
139
Figure 9-16. High Speed Configuration Setup
140
Figure 9-17. Transmitting TCF
141
Figure 9-18. High Speed Message Transmission
142
Figure 9-19. High Speed Interrupt-Driven Transmit
143
Figure 9-20. High Speed Reception Setup
144
Figure 9-21. High Speed Interrupt Driven Receive
145
Figure 9-22. Valid Training Sequence Check
146
Error Correction Mode
147
General
147
ECM Frame Structure
147
Figure 9-23. ECM Frame Structure
148
Figure 9-24. ECM Message Protocol Example
149
Figure 9-25. PPS and PPR Frame Structure
150
Signal Recognition Algorithm
151
FSK Vs. High Speed
151
FAX Vs. Voice
151
Table 9-1. FR3 Coefficient for 1650 Hz Detection
151
Figure 9-26. Signal Recognition Algorithm in High Speed Mode
152
Figure 9-27. FSK Signal Detection Algorithm in Voice Mode
153
Figure 9-28. CNG Detection (1100 Hz) in Voice Mode
154
Short Train Example
155
Figure 9-29. Example V.17 Short Train Time Line
155
10 Caller ID
157
Introduction
157
Calling Number Delivery Specification
157
Parameters
157
Protocol
157
Figure 10-1. DAA Circuit Supporting CND
158
Daa Requirements
159
Modem Requirements
159
Applications
159
References
159
Figure 10-2. Caller ID Example Flowchart
160
11 Digital Equalization/High Pass Filter
163
Programmable Digital Equalizer (Pde)
163
PDE Frequency Response
163
PDE Coefficients
163
Fixed Digital Cable Compromise Equalizer
163
High Pass Filter
163
Figure 11-1. High Speed and V.21 Receive Signal Path
164
Figure 11-2. High Speed and V.21 Transmit Signal Path
165
Figure 11-3. PDE Block Diagram
165
Figure 11-4. PDE Response
166
Figure 11-5. Digital Cable Equalizer Frequency Response
167
Table 11-1. PDE Poles and Zeros
167
Table 11-2. PDE PRAM Access Codes
167
Figure 11-6. Receive Path Frequency Response Without HPF
168
Figure 11-7. Receive Path Frequency Response with HPF
169
12 Full-Duplex Speakerphone
171
Introduction
171
Speakerphone Design
171
Microphone/Speaker Placements
171
Microphone and Speaker Gains
172
Hybrid Interface
172
Speakerphone Control
172
Speakerphone Mode Registers
172
FDX Speakerphone Mode
173
Tone Transmit Mode
173
Handset Mode
173
Microphone Volume Control
174
Speaker Volume Control
174
Microphone and Speaker Muting
175
Microphone and Speaker AGC
175
Speech Detectors
175
Scaling of Transmit Output to Line
176
Speakerphone Modes and Active Bits
176
Table 12-1. Register Location 0E Use
177
Table 12-2. Register Location 0F Use
177
13 Performance
179
Typical Bit Error Rates
179
Typical Phase Jitter
179
Dtmf Performance
179
Table 13-1. DTMF Receiver Performance Characteristics
180
Figure 13-1. Typical Bit Error Rate (BER) Curves
181
14 Modem Interface Circuit
185
Circuit and Components
185
Crystal/Oscillator Specifications
185
Transmit Level and Receive Threshold Trimmers
185
Echo Canceller Working Condition
185
Room Acoustic Echo Canceller Working Condition
185
Figure 14-1. Recommended Modem/Speakerphone Interface Circuit
186
Figure 14-2. Typical Line Interface Circuit
187
Figure 14-3. Typical Interface to External Hybrid
187
Figure 14-4. Typical Microphone Circuit
188
Figure 14-5. Typical Speaker Circuit
188
Table 14-1. Typical Modem Interface Parts List
189
Table 14-2. Crystal Specifications - 49.92 Mhz/53.76 Mhz - Third Overtone - Surface Mount
191
Pc Board Layout Considerations
192
General Board Layout Guidelines
192
Electromagnetic Interference (EMI) Considerations
193
Crystal Oscillator EMI Considerations
193
Table 14-3. Modem Pin Noise Characteristics
194
15 Package Dimensions
195
Figure 15-1. 100-Pin PQFP Dimensions
195
Figure 15-2. 28-Pin PLCC Dimensions
196
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