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Renkforce 4519 Manuals
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Renkforce 4519 manual available for free PDF download: User Manual
Renkforce 4519 User Manual (274 pages)
4-BIT CISC SINGLE-CHIP MICROCOMPUTER
Brand:
Renkforce
| Category:
Computer Hardware
| Size: 2 MB
Table of Contents
Table of Contents
7
Chapter 1 Hardware
16
Description
16
Features
16
Application
16
Pin Configuration
16
Block Diagram
16
Performance Overview
16
Pin Description
16
Multifunction
21
Definition of Clock and Cycle
21
Table Selection of System Clock
21
Port Function
22
Connections of Unused Pins
23
Port Block Diagrams
24
Function Block Operations
32
Cpu
32
Fig. 1 AMC Instruction Execution Example
32
Fig. 2 RAR Instruction Execution Example
32
Fig. 3 Registers A, B and Register E
32
Fig. 4 TABP P Instruction Execution Example
32
Fig. 5 Stack Registers (Sks) Structure
33
Fig. 6 Example of Operation at Subroutine Call
33
Fig. 7 Program Counter (PC) Structure
34
Fig. 8 Data Pointer (DP) Structure
34
Fig. 9 SD Instruction Execution Example
34
Program Memory (Rom)
35
Fig. 10 ROM Map of M34519M8/E8
35
Table 1 ROM Size and Pages
35
Data Memory (Ram)
36
Fig. 12 RAM Map
36
Table 2 RAM Size
36
Interrupt Function
37
Table 3 Interrupt Sources
37
Table 4 Interrupt Request Flag, Interrupt Enable Bit and Skip Instruction
37
Table 5 Interrupt Enable Bit Function
37
Fig. 13 Program Example of Interrupt Processing
38
Fig. 14 Internal State When Interrupt Occurs
38
Fig. 15 Interrupt System Diagram
38
Table 6 Interrupt Control Registers
39
Fig. 16 Interrupt Sequence
40
External Interrupts
41
Fig. 17 External Interrupt Circuit Structure
41
Table 7 External Interrupt Activated Conditions
41
Table 8 External Interrupt Control Register
43
Fig. 18 External 0 Interrupt Program Example-1
44
Fig. 19 External 0 Interrupt Program Example-2
44
Fig. 20 External 0 Interrupt Program Example-3
44
Fig. 21 External 1 Interrupt Program Example-1
45
Fig. 22 External 1 Interrupt Program Example-2
45
Fig. 23 External 1 Interrupt Program Example-3
45
Timers
46
Fig. 24 Auto-Reload Function
46
Table 9 Function Related Timers
47
Fig. 25 Timer Structure (1)
48
Fig. 26 Timer Structure (2)
49
Table 10 Timer Related Registers
50
Fig. 27 Period Measurement Circuit Program Example
54
Fig. 28 Period Measurement Circuit Program Example
56
Fig. 29 Timer 4 Operation
57
Fig. 31 Timer 4 Count Start/Stop Timing
59
Watchdog Timer
60
Fig. 32 Watchdog Timer Function
60
Fig. 33 Program Example to Start/Stop Watchdog Timer
61
Fig. 34 Program Example to Enter the Mode When Using the Watchdog Timer
61
A/D Converter (Comparator)
62
Fig. 35 A/D Conversion Circuit Structure
62
Table 11 A/D Converter Characteristics
62
Table 12 A/D Control Registers
63
Table 13 Change of Successive Comparison Register AD During A/D Conversion
64
Fig. 36 A/D Conversion Timing Chart
65
Fig. 37 Setting Registers
65
Fig. 38 Comparator Operation Timing Chart
66
Fig. 39 Definition of A/D Conversion Accuracy
67
Serial I/O
68
Fig. 40 Serial I/O Structure
68
Table 14 Serial I/O Pins
68
Table 15 Serial I/O Control Register
68
Fig. 41 Serial I/O Register State When Transferring
69
Fig. 42 Serial I/O Connection Example
70
Fig. 43 Timing of Serial I/O Data Transfer
71
Table 16 Processing Sequence of Data Transfer from Master to Slave
72
Reset Function
73
Fig. 44 Reset Release Timing
73
Fig. 46 Structure of Reset Pin and Its Peripherals, and Power-On Reset Operation
74
Table 17 Port State at Reset
74
Voltage Drop Detection Circuit
77
Fig. 49 Voltage Drop Detection Reset Circuit
77
Fig. 50 Voltage Drop Detection Circuit Operation Waveform
77
Table 18 Voltage Drop Detection Circuit Operation State
77
Ram Back-Up Mode
78
Table 19 Functions and States Retained at RAM Back-Up
78
Table 20 Return Source and Return Condition
79
Fig. 51 State Transition
80
Fig. 52 Set Source and Clear Source of the P Flag
80
Fig. 53 Start Condition Identified Example Using the SNZP Instruction
80
Table 21 Key-On Wakeup Control Register, Pull-Up Control Register
81
Table 22 Key-On Wakeup Control Register, Pull-Up Control Register
82
Clock Control
83
Fig. 54 Clock Control Circuit Structure
83
Fig. 55 Switch to Ceramic Resonance/Rc Oscillation/Quartz-Crystal Oscillation
84
Fig. 56 Handling of
85
Fig. 57 Ceramic Resonator External Circuit
85
Fig. 58 External RC Oscillation Circuit
85
Fig. 59 External Quartz-Crystal Circuit
85
Fig. 60 External Clock Input Circuit
85
Rom Ordering Method
86
Table 23 Clock Control Registers
86
List of Precautions
87
Fig. 61 Period Measurement Circuit Program Example
88
Fig. 62 External 0 Interrupt Program Example-1
89
Fig. 63 External 0 Interrupt Program Example-2
89
Fig. 64 External 0 Interrupt Program Example-3
89
Fig. 65 External 1 Interrupt Program Example-1
90
Fig. 66 External 1 Interrupt Program Example-2
90
Fig. 67 External 1 Interrupt Program Example-3
90
Fig. 68 A/D Converter Program Example-3
91
Fig. 69 Analog Input External Circuit Example-1
91
Fig. 70 Analog Input External Circuit Example-2
91
Control Registers
93
Instructions
100
Symbol
100
Index List of Instruction Function
101
Machine Instructions (Index by Alphabet)
106
Machine Instructions (Index by Types)
145
Instruction Code Table
161
Built-In Prom Version
163
Fig. 71 Pin Configuration of Built-In PROM Version
163
Table 24 Product of Built-In PROM Version
163
Fig. 73 Flow of Writing and Test of the Product Shipped in Blank
164
Table 25 Programming Adapter
164
Chapter 2 Application
165
I/O Pins
165
I/O Ports
166
Chapter 2 Application
167
Related Registers
170
Table 2.1.1 Timer Control Register W4
170
Table 2.1.2 Timer Control Register W6
170
Table 2.1.3 Serial I/O Control Register J1
171
Table 2.1.4 A/D Control Register Q2
171
Table 2.1.5 Pull-Up Control Register PU0
172
Table 2.1.6 Pull-Up Control Register PU1
172
Table 2.1.7 Port Output Structure Control Register FR0
173
Table 2.1.8 Port Output Structure Control Register FR1
173
Table 2.1.9 Port Output Structure Control Register FR2
174
Table 2.1.10 Port Output Structure Control Register FR3
174
Table 2.1.11 Key-On Wakeup Control Register K0
175
Table 2.1.12 Key-On Wakeup Control Register K2
175
Port Application Examples
176
Fig. 2.1.1 Key Input by Key Scan
176
Fig. 2.1.2 Key Scan Input Timing
176
Notes on Use
177
Table 2.1.13 Connections of Unused Pins
178
Interrupts
179
Interrupt Functions
179
Related Registers
182
Table 2.2.1 Interrupt Control Register V1
182
Table 2.2.2 Interrupt Control Register V2
183
Table 2.2.3 Interrupt Control Register I1
183
Table 2.2.4 Interrupt Control Register I2
184
Interrupt Application Examples
185
Fig. 2.2.1 External 0 Interrupt Operation Example
186
Fig. 2.2.2 External 0 Interrupt Setting Example
187
Fig. 2.2.3 External 1 Interrupt Operation Example
188
Fig. 2.2.4 External 1 Interrupt Setting Example
189
Fig. 2.2.5 Timer 1 Constant Period Interrupt Setting Example
190
Fig. 2.2.6 Timer 2 Constant Period Interrupt Setting Example
191
Fig. 2.2.7 Timer 3 Constant Period Interrupt Setting Example
192
Fig. 2.2.8 Timer 4 Constant Period Interrupt Setting Example
193
Notes on Use
194
Timers
195
Timer Functions
195
Related Registers
196
Table 2.3.1 Interrupt Control Register V1
196
Table 2.3.2 Interrupt Control Register V2
196
Rev.1.00 Aug 06, 2004
196
Table 2.3.3 Interrupt Control Register I1
197
Table 2.3.4 Interrupt Control Register I2
197
Table 2.3.5 Timer Control Register PA
198
Table 2.3.6 Timer Control Register W1
198
Table 2.3.7 Timer Control Register W2
198
Table 2.3.8 Timer Control Register W3
199
Table 2.3.9 Timer Control Register W4
199
Table 2.3.10 Timer Control Register W5
200
Table 2.3.11 Timer Control Register W6
200
Timer Application Examples
201
Fig. 2.3.1 Peripheral Circuit Example
201
Fig. 2.3.2 Timer 4 Operation
202
Fig. 2.3.3 Watchdog Timer Function
203
Fig. 2.3.4 Constant Period Measurement Setting Example
204
Fig. 2.3.5 CNTR0 Output Setting Example
205
Fig. 2.3.6 CNTR0 Input Setting Example
206
Fig. 2.3.7 Timer Start by External Input Setting Example
207
Fig. 2.3.8 PWM Output Control Setting Example
208
Fig. 2.3.13 Watchdog Timer Setting Example
213
Notes on Use
214
Fig. 2.3.14 Period Measurement Circuit Program Example
215
Fig. 2.3.15 Count Start Time and Count Time When Operation Starts (PS, T1, T2 and T3)
215
Fig. 2.3.16 Count Start Time and Count Time When Operation Starts (T4)
215
A/D Converter
216
Fig. 2.4.1 A/D Converter Structure
216
Related Registers
217
Table 2.4.1 Interrupt Control Register V2
217
Table 2.4.2 A/D Control Register Q1
217
A/D Converter Application Examples
218
Table 2.4.3 A/D Control Register Q2
218
Table 2.4.4 A/D Control Register Q3
218
Fig. 2.4.2 A/D Conversion Mode Setting Example
219
Notes on Use
220
Fig. 2.4.3 Analog Input External Circuit Example-1
220
Fig. 2.4.4 Analog Input External Circuit Example-2
220
Fig. 2.4.5 A/D Converter Operating Mode Program Example
220
Serial I/O
222
Serial I/O Functions
222
Fig. 2.5.1 Serial I/O Block Diagram
222
Related Registers
223
Table 2.5.1 Interrupt Control Register V2
223
Table 2.5.2 Serial I/O Mode Register J1
223
Operation Description
224
Fig. 2.5.2 Serial I/O Connection Example
224
Fig. 2.5.3 Serial I/O Register State When Transfer
224
Fig. 2.5.4 Serial I/O Transfer Timing
225
Serial I/O Application Example
227
Fig. 2.5.5 Setting Example When a Serial I/O of Master Side Is Not Used
228
Fig. 2.5.6 Setting Example When a Serial I/O Interrupt of Slave Side Is Used
229
Notes on Use
230
Reset
231
Reset Circuit
231
Fig. 2.6.1 Structure of Reset Pin and Its Peripherals, and Power-On Reset Operation
231
Fig. 2.6.2 Oscillation Stabilizing Time after System Is Released from Reset
231
Internal State at Reset
232
Fig. 2.6.3 Internal State at Reset
232
Notes on Use
233
Fig. 2.6.4 Internal State at Reset
233
Voltage Drop Detection Circuit
234
Fig. 2.7.1 Voltage Drop Detection Circuit
234
Fig. 2.7.2 Voltage Drop Detection Circuit Operation Waveform Example
234
Table 2.7.1 Voltage Drop Detection Circuit Operation State
234
RAM Back-Up
235
RAM Back-Up Mode
235
Fig. 2.8.1 State Transition
235
Table 2.8.1 Functions and States Retained at RAM Back-Up Mode
236
Fig. 2.8.2 Start Condition Identified Example
237
Table 2.8.2 Return Source and Return Condition
237
Table 2.8.3 Start Condition Identification
237
Related Registers
238
Table 2.8.4 Interrupt Control Register I1
238
Table 2.8.5 Interrupt Control Register I2
238
Table 2.8.6 Pull-Up Control Register PU0
239
Table 2.8.7 Pull-Up Control Register PU1
240
Table 2.8.8 Key-On Wakeup Control Register K0
240
Table 2.8.9 Key-On Wakeup Control Register K1
241
Table 2.8.10 Key-On Wakeup Control Register K2
241
Notes on Use
242
Oscillation Circuit
243
Oscillation Operation
243
Fig. 2.9.1 Structure of Clock Control Circuit
243
Related Register
244
Table 2.9.1 Clock Control Register MR
244
Table 2.9.2 Clock Control Register RG
244
Chapter 3 Appendix
246
Electrical Characteristics
246
Absolute Maximum Ratings
247
Table 3.1.1 Absolute Maximum Ratings
247
Recommended Operating Conditions
248
Electrical Characteristics
249
Chapter 3 Appendix
251
Table 3.1.5 Electrical Characteristics 1
251
Table 3.1.6 Electrical Characteristics 2
252
A/D Converter Recommended Operating Conditions
253
Table 3.1.7 A/D Converter Recommended Operating Conditions
253
Table 3.1.8 A/D Converter Characteristics
254
Voltage Drop Detection Circuit Characteristics
255
Basic Timing Diagram
255
Table 3.1.9 Voltage Drop Detection Circuit Characteristics
255
Typical Characteristics
256
List of Precautions
257
Program Counter
257
Stack Registers (Sks)
257
Notes on I/O Port
257
Table 3.3.1 Connections of Unused Pins
258
Notes on Interrupt
259
Notes on Timer
260
Fig. 3.3.1 Period Measurement Circuit Program Example
261
Fig. 3.3.2 Count Start Time and Count Time When Operation Starts (PS, T1, T2 and T3)
261
Fig. 3.3.3 Count Start Time and Count Time When Operation Starts (T4)
261
Notes on A/D Conversion
262
Fig. 3.3.4 Analog Input External Circuit Example-1
262
Fig. 3.3.5 Analog Input External Circuit Example-2
262
Fig. 3.3.6 A/D Converter Operating Mode Program Example
262
Notes on Serial I/O
263
Notes on Reset
263
Notes on RAM Back-Up
264
Notes on Clock Control
265
Electric Characteristic Differences between Mask ROM and One Time PROM Version MCU
265
Note on Power Source Voltage
265
Notes on Noise
266
Shortest Wiring Length
266
Fig. 3.4.1 Selection of Packages
266
Fig. 3.4.3 Wiring for Clock I/O Pins
267
Fig. 3.4.4 Wiring for CNV SS Pin
267
Connection of Bypass Capacitor Across
268
Ss DD
268
SS Line and V DD Line
268
Fig. 3.4.5 Wiring for the V
268
Fig. 3.4.6 Bypass Capacitor Across the V
268
Wiring to Analog Input Pins
269
Oscillator Concerns
269
Fig. 3.4.7 Analog Signal Line and a Resistor and a Capacitor
269
Fig. 3.4.8 Wiring for a Large Current Signal Line
269
Setup for I/O Ports
270
Providing of Watchdog Timer Function by Software
270
Fig. 3.4.9 Wiring to a Signal Line Where Potential Levels Change Frequently
270
Fig. 3.4.10 VSS Pattern on the Underside of an Oscillator
270
Fig. 3.4.11 Watchdog Timer by Software
271
Package Outline
272
Rev.1.00
272
Aug 06, 2004
272
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