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R7F0C80212ESP
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Manuals and User Guides for Renesas R7F0C80212ESP. We have
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Renesas R7F0C80212ESP manual available for free PDF download: User Manual
Renesas R7F0C80212ESP User Manual (438 pages)
8-Bit Single-Chip Microcontrollers
Brand:
Renesas
| Category:
Microcontrollers
| Size: 5 MB
Table of Contents
Table of Contents
6
Chapter 1 Outline
15
Features
15
List of Part Numbers
16
Pin Configuration (Top View)
17
Pin Identification
17
Block Diagram
18
Outline of Functions
19
Chapter 2 Pin Functions
20
Port Functions
20
Functions Other than Port Pins
21
Pin I/O Circuits and Recommended Connection of Unused Pins
22
Chapter 3 Cpu Architecture
24
Address Space
25
Internal Program Memory Space
27
Mirror Area
29
Internal Data Memory Space
30
Special Function Register (SFR) Area
30
Extended Special Function Register (2Nd SFR: 2Nd Special Function Register) Area
30
Data Memory Addressing
30
Processor Registers
32
Control Registers
32
General-Purpose Registers
34
And CS Registers
36
Special Function Registers (Sfrs)
37
Extended Special Function Registers (2Nd Sfrs: 2Nd Special Function Registers)
40
Instruction Address Addressing
43
Relative Addressing
43
Immediate Addressing
43
Register Direct Addressing
44
Addressing for Processing Data Addresses
45
Implied Addressing
45
Register Addressing
45
Direct Addressing
46
Short Direct Addressing
47
SFR Addressing
48
Register Indirect Addressing
49
Based Addressing
50
Based Indexed Addressing
54
Stack Addressing
55
Chapter 4 Port Functions
59
Port Functions
59
Port Configuration
59
Port 0
60
Port 4
60
Port 12
60
Port 13
60
Registers Controlling Port Function
61
Port Mode Registers 0, 4(PM0, PM4)
62
Port Registers 0, 4, 12, 13 (P0, P4, P12, P13)
63
Pull-Up Resistor Option Registers 0, 4, 12 (PU0, PU4, PU12)
64
Port Output Mode Register (POM0)
65
Port Mode Control Registers (PMC0)
66
Peripheral I/O Redirection Register (PIOR)
67
Port Function Operations
68
Writing to I/O Port
68
Reading from I/O Port
68
Operations on I/O Port
68
Register Settings When an Alternate Function Is Used
69
Basic Concepts on Using an Alternate Function
69
Register Settings for Alternate Functions that Do Not Use an Output Function
70
Example of Register Settings for Port and Alternate Functions Used
70
Cautions When Using Port Function
73
Cautions on 1-Bit Manipulation Instruction for Port Register N (Pn)
73
Notes on Specifying the Pin Settings
74
Chapter 5 Clock Generator
75
Functions of Clock Generator
75
Configuration of Clock Generator
76
Registers Controlling Clock Generator
78
Peripheral Enable Register 0 (PER0)
79
High-Speed On-Chip Oscillator Frequency Selection Register (HOCODIV)
80
System Clock Oscillator
81
High-Speed On-Chip Oscillator
81
Low-Speed On-Chip Oscillator
81
Clock Generator Operation
81
Controlling Clock
83
Example of Setting High-Speed On-Chip Oscillator
83
CPU Clock Status Transition Diagram
84
Chapter 6 Timer Array Unit
86
Functions of Timer Array Unit
87
Independent Channel Operation Function
87
Simultaneous Channel Operation Function
88
8-Bit Timer Operation Function (Channel 1 Only)
89
Configuration of Timer Array Unit
90
Timer/Counter Register 0N (Tcr0N)
93
Timer Data Register 0N (Tdr0N)
95
Registers Controlling Timer Array Unit
97
Peripheral Enable Register 0 (PER0)
98
Timer Clock Select Register 0 (TPS0)
99
Timer Mode Register 0N (Tmr0Nh, Tmr0Nl)
101
Timer Status Register 0N (Tsr0N)
105
Timer Channel Enable Status Register 0 (TE0, TEH0 (8-Bit Mode))
106
Timer Channel Start Register 0 (TS0, TSH0 (8-Bit Mode))
107
Timer Channel Stop Register 0 (TT0, TTH0 (8-Bit Mode))
108
Timer Output Enable Register 0 (TOE0)
109
Timer Output Register 0 (TO0)
110
Timer Output Level Register 0 (TOL0)
111
Timer Output Mode Register 0 (TOM0)
112
Noise Filter Enable Register 1 (NFEN1)
113
Port Mode Register 0 (PM0)
114
Basic Rules of Timer Array Unit
115
Basic Rules of Simultaneous Channel Operation Function
115
Basic Rules of 8-Bit Timer Operation Function (Only Channel 1)
116
Operation of Counter
117
Count Clock (Ftclk)
117
Start Timing of Counter
119
Counter Operation
120
Channel Output (To0N Pin) Control
125
To0N Pin Output Circuit Configuration
125
To0N Pin Output Setting
126
Cautions on Channel Output Operation
127
Collective Manipulation of To0N Bit
131
Timer Interrupt and To0N Pin Output at Operation Start
132
Independent Channel Operation Function of Timer Array Unit
133
Operation as Interval Timer/Square Wave Output
133
Operation as External Event Counter
139
Operation as Frequency Divider (Channel 0 Only)
144
Operation as Input Pulse Interval Measurement
148
Operation as Input Signal High-/Low-Level Width Measurement
153
Operation as Delay Counter
157
Simultaneous Channel Operation Function of Timer Array Unit
162
Operation as One-Shot Pulse Output Function
162
Operation as PWM Function
169
Cautions When Using Timer Array Unit
176
Cautions When Using Timer Output
176
Chapter 7 Clock Output/Buzzer Output Controller
177
Functions of Clock Output/Buzzer Output Controller
177
Configuration of Clock Output/Buzzer Output Controller
178
Registers Controlling Clock Output/Buzzer Output Controller
178
Clock Output Select Register 0 (CKS0)
178
Port Mode Registers 0, 4 (PM0, PM4)
180
Operations of Clock Output/Buzzer Output Controller
181
Operation as Output Pin
181
Chapter 8 Watchdog Timer
182
Functions of Watchdog Timer
182
Configuration of Watchdog Timer
183
Register Controlling Watchdog Timer
184
Watchdog Timer Enable Register (WDTE)
184
Operation of Watchdog Timer
185
Controlling Operation of Watchdog Timer
185
Setting Overflow Time of Watchdog Timer
186
Chapter 9 A/D Converter
187
Function of A/D Converter
187
Configuration of A/D Converter
189
Registers Used in A/D Converter
191
Peripheral Enable Register 0 (PER0)
191
A/D Converter Mode Register 0 (ADM0)
192
A/D Converter Mode Register 2 (ADM2)
196
A/D Conversion Result Higher Bit Storage Register (ADCRH)
196
A/D Conversion Result Lower Bit Storage Register (ADCRL)
197
Analog Input Channel Specification Register (ADS)
198
Port Mode Control Register 0 (PMC0)
199
Port Mode Register 0 (PM0)
200
A/D Converter Conversion Operations
201
Input Voltage and Conversion Results
203
A/D Converter Operation Modes
204
A/D Converter Setup Flowchart
205
How to Read A/D Converter Characteristics Table
206
Resolution
206
Overall Error
206
Quantization Error
206
Zero-Scale Error
206
Full-Scale Error
207
Integral Linearity Error
207
Differential Linearity Error
207
Conversion Time
207
Sampling Time
207
Cautions for A/D Converter
208
Operating Current in STOP Mode
208
Input Range of ANI0 to ANI3 Pins
208
Conflicting Operations
208
Noise Countermeasures
208
Analog Input (Anin) Pins
209
Input Impedance of Analog Input (Anin) Pins
209
Interrupt Request Flag (ADIF)
210
Conversion Results Just after A/D Conversion Start
210
A/D Conversion Result Register (ADCRH, ADCRL) Read Operation
210
Internal Equivalent Circuit
211
Starting the A/D Converter
211
Chapter 10 Serial Array Unit
212
Functions of Serial Array Unit
213
3-Wire Serial I/O (CSI00)
213
Uart (Uart0)
214
Configuration of Serial Array Unit
215
Shift Register
217
Serial Data Register 0N (Sdr0Nh, Sdr0Nl)
217
Registers Controlling Serial Array Unit
219
Peripheral Enable Register 0 (PER0)
220
Serial Clock Select Register 0 (SPS0)
221
Serial Mode Register 0N (Smr0Nh, Smr0Nl)
222
Serial Communication Operation Setting Register 0N (Scr0Nh, Scr0Nl)
224
Serial Data Register 0N (Sdr0Nh, Sdr0Nl)
227
Serial Flag Clear Trigger Register 0N (Sir0N)
228
Serial Status Register 0N (Ssr0N)
229
Serial Channel Start Register 0 (SS0)
231
Serial Channel Stop Register 0 (ST0)
232
Serial Channel Enable Status Register 0 (SE0)
233
Serial Output Enable Register 0 (SOE0)
234
Serial Output Register 0 (SO0)
235
Serial Clock Output Register (CKO0)
236
Serial Output Level Register 0 (SOL0)
237
Noise Filter Enable Register 0 (NFEN0)
238
Input Switch Control Register (ISC)
239
Port Output Mode Register 0 (POM0)
240
Port Mode Register 0 (PM0)
241
Operation Stop Mode
242
Stopping the Operation by Units
242
Stopping the Operation by Channels
243
Operation of 3-Wire Serial I/O (CSI00) Communication
244
Master Transmission
245
Master Reception
255
Master Transmission/Reception
264
Slave Transmission
274
Slave Reception
284
Slave Transmission/Reception
291
Calculating Transfer Clock Frequency
301
Procedure for Processing Errors that Occurred During 3-Wire Serial I/O (CSI00) Communication
302
Operation of UART (UART0) Communication
303
UART Transmission
304
UART Reception
314
Calculating Baud Rate
321
Procedure for Processing Errors that Occurred During UART (UART0) Communication
324
Chapter 11 Interrupt Functions
325
Interrupt Function Types
325
Interrupt Sources and Configuration
325
Registers Controlling Interrupt Functions
329
Interrupt Request Flag Registers (IF0L, IF0H)
330
Interrupt Mask Flag Registers (MK0L, MK0H)
331
Priority Specification Flag Registers (PR00L, PR00H, PR10L, PR10H)
332
External Interrupt Rising Edge Enable Register (EGP0)
334
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