NEC uPD77213 Manuals

Manuals and User Guides for NEC uPD77213. We have 1 NEC uPD77213 manual available for free PDF download: User Manual

NEC uPD77213 User Manual (259 pages)

Digital Signal Processor, Architecture

Brand: NEC | Category: Signal Processors | Size: 1 MB

Regional Information
5
Table of Contents
8
List of Figures
14
Chapter 1 General
17
Comparison with Μ Μ Μ Μ PD77111 Family
17
High-Speed Operation
17
Low Power Consumption
17
Expanded Peripheral Functions
17
Features
18
DSP Core Kernel
18
Peripheral Block
18
Ordering Information
21
Chapter 2 Pin Functions
22
Pin Connection
23
161-Pin Plastic Fine Pitch BGA (10 × 10)
23
161-Pin Plastic Fine Pitch BGA
23
144-Pin Plastic LQFP (Fine Pitch) (20 × 20)
25
Pin Configuration
27
Pin Functions
28
Host Interface
32
Connection of Unused Pins
35
Chapter 3 Use Methods
37
From Power-On to Program Execution
37
From Power-On to User Program Execution
37
Power-On
38
Reset
38
Boot
38
Program Execution
38
Standby Mode
39
Clock Settings after Boot Operation
39
Chapter 4 Architecture
41
Overall Block Configuration
41
DSP Core Kernel
42
Buses
44
Main Bus
44
Data Bus
45
Peripheral ↔ Memory Transfer Bus
47
System Control Units
48
Clock Generator
49
Reset Function
50
Reset Operation Timing
51
Pipeline Architecture
54
Pipeline Image
54
Standby Functions
57
Program Control Unit
59
Block Configuration
59
Program Execution Control Block
60
Instruction Memory Map
61
Flow Control Block
69
Repeat Execution Timing (Repetition of 2 Times)
72
Loop Execution Timing (Example of 2 Loops Operation)
75
Interrupts
77
Interrupt Acknowledging Timing
85
Error Status Register (ESR)
89
Data Addressing Unit
90
Block Configuration
90
Data Memory Space
90
Data Memory Map
91
Instruction Memory Aliasing
94
External Data Memory Map
95
Addressing Mode
97
Operation Unit
108
Block Configuration
109
General-Purpose Registers and Data Formats
109
Operation Functions of Multiply Accumulator (MAC) and MAC Input Shifter (MSFT)
113
Signed-Signed Multiply
113
Signed-Unsigned Multiply
113
Unsigned-Unsigned Multiply
113
Accumulative Multiplication
117
1-Bit Shift Accumulative Multiplication
117
Operation Functions of Arithmetic and Logic Unit (ALU)
121
Operation Functions of Barrel Shifter (BSFT)
123
Chapter 5 Peripherals
125
Block Configuration
126
Peripheral Registers
127
Time Division Multiplexing (TDM) Serial Interface (TSIO)
130
TDM Serial Interface Pins
131
TDM Serial Interface Registers
132
Timing of TDM Serial Interface
136
Audio Serial Interface (ASIO)
139
Audio Serial Interface Pins
141
Audio Serial Interface Registers
142
Timing of Audio Serial Interface
145
Precautions on ASIO During Startup
147
Standard Serial Interface (SIO)
148
Standard Serial Interface Pins
149
Standard Serial Interface Registers
150
Timing of Serial Interface
153
Precautions on SIO During Startup
161
Host Interface (HIO)
162
Host Interface Pins
163
Host Interface Registers
164
Host Interface Registers from Perspective of Host
166
Timing of Host Interface
167
External Data Memory Interface (MIO)
172
Memory Interface Pins
174
External Data Memory Interface Registers
174
Direct Access
180
DMA Access
181
Direct Access Timing
183
DMA Access Timing
184
Timing of Memory Access
185
Peripheral ↔ ↔ Memory Transfer (PMT)
187
PMT Registers
189
PMT Operation Modes
191
PMT Transfer Steps
192
General-Purpose I/O Port (PIO)
193
General-Purpose I/O Port Pins
193
General-Purpose I/O Port Registers
194
Timing of General-Purpose I/O Port
196
Example Program
197
Example of Port Programming
200
Interrupt Controller (INTC)
201
Interrupt Controller's Registers
202
Operation Modes of Interrupt Controller
203
Interrupt Table
204
Hardware Conditions During Interrupt from External Interrupt Pins
205
Interrupt-Related Precautions
206
Timer (TIM)
209
Timer Pins
210
Timer Registers
210
Operation of Timer
212
Precautions on Use of Timer
212
Clock Controller (CLKC)
213
Clock Controller's Register
214
Timing of Clock Switching
216
Precaution Points on Clock Control
217
Instruction Memory Correction Function (IMC)
221
Registers for Instruction Memory Correction Function
221
Operation of Instruction Correction Function
222
Paging Function
222
Registers for Paging Function
223
Operation of Paging Function
223
Peripheral STOP Mode
224
Peripheral STOP Mode Register
224
Operation of Peripheral STOP Mode
225
Debug Interface (IEIO)
225
JTAG Port
225
Debug Interface Pins
226
Boundary Scan Test Function
226
Debug Function (In-Circuit Emulator Function)
227
Expansion Interfaces (Additional I/O)
228
Expansion Interface Register
229
SD Card Interface (SDCIF)
230
SD Card Interface Pins
231
SD Card Interface Registers
232
CRC (Cyclic Redundancy Codes) Circuit
237
Operation of SD Card Interface
238
Chapter 6 Boot Functions
240
Initial Reset Boot
240
Boot Mode Specification
240
Memory Boot
241
Y Memory Boot
242
XY Memory Boot
243
External Data Memory Boot
244
Host Boot
245
Serial Boot
247
Non-Boot
247
Initial Reset Boot and PLL
248
Reboot
249
Appendix A Index
250
Terminology Index
250
Register Index
253
Register Name Order
253
Register Symbol Order
256

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