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NEC mPD78F0818 manual available for free PDF download: Preliminary User's Manual
NEC mPD78F0818 Preliminary User's Manual (414 pages)
8-bit Single-Chip Microcontroller
Brand:
NEC
| Category:
Microcontrollers
| Size: 1 MB
Table of Contents
Regional Information
3
Table of Contents
8
Chapter 1 Outline (Μpd780814 Subseries)
26
Features
26
Application
26
Ordering Information
26
Pin Configuration (Top View)
27
Pin Configuration
27
Series Development
29
Block Diagram
30
Overview of Functions
31
Differences between Flash and Mask ROM Version
32
Chapter 2 Pin Function (Μpd780814 Subseries)
34
Pin Function List
34
Pin Input/Output Types
34
Non-Port Pins
35
Description of Pin Functions
36
P00 to P03 (Port 0)
36
P10 to P17 (Port 1)
36
P20 to P27 (Port 2)
36
P40 to P47 (Port 4)
37
P50 to P57 (Port 5)
37
P60 to P67 (Port 6)
37
P70, P71 (Port 7)
38
Ctxd
38
Crxd
38
Cclk
38
ANI8 to ANI11
38
Avdd
38
Avss
38
Reset
39
X1 and X2
39
CL1 and CL2
39
Vdd0, Vdd1
39
Vss0, Vss1
39
VPP (Μpd78F0818 Only)
39
IC (Mask ROM Version Only)
39
Connection of IC Pins
39
Pin I/O Circuits and Recommended Connection of Unused Pins
40
Types of Pin Input/Output Circuits
40
Pin Input/Output Circuits (2/2)
41
Chapter 3 CPU Architecture
44
Memory Space
44
Memory Map (Μpd780812)
44
Memory Map (Μpd780814)
45
Memory Map (Μpd78F0818)
46
Internal Program Memory Space
47
Internal ROM Capacities
47
Vectored Interrupts
48
Internal Data Memory Space
49
Special Function Register (SFR) Area
49
Data Memory Addressing
50
Data Memory Addressing (Μpd780812)
50
Data Memory Addressing (Μpd780814)
51
Data Memory Addressing (Μpd78F0818)
52
Processor Registers
53
Control Registers
53
Program Counter Configuration
53
Program Status Word Configuration
53
Stack Pointer Configuration
55
Data to be Saved to Stack Memory
55
Data to be Reset to Stack Memory
55
General Registers
56
General Register Configuration
56
Special Function Register (SFR)
57
Special Function Register List (3/3)
58
Instruction Address Addressing
61
Relative Addressing
61
Immediate Addressing
62
Register Addressing
64
Operand Address Adressing
65
Implied Addressing
65
Register Addressing
66
Direct Addressing
67
Short Direct Addressing
68
Special Function Register (SFR) Addressing
69
Special-Function Register (SFR) Addressing
69
Register Indirect Addressing
70
Special-Function Register (SFR) Addressing
70
Based Addressing
71
Based Indexed Addressing
72
Stack Addressing
72
Chapter 4 EEPROM
74
EEPROM Functions
74
EEPROM Configuration
75
EEPROM Block Diagram
75
EEPROM Control Register
76
EEPROM Write Control Register (EEWC) Format
76
EEPROM Reading
77
EEPROM Writing
78
EEPROM Control-Related Interrupt
78
Chapter 5 Port Functions
80
Port Functions
80
Port Types
80
Pin Input/Output Types
81
Port Configuration
82
Port 0
83
P00 to P03 Configurations
83
Port 1
84
P10 to P17 Configurations
84
Port 2
85
P20 to P27 Configurations
85
Port 4
86
P40 to P47 Configurations
86
Block Diagram of Falling Edge Detection Circuit
86
Port 5
87
P50 to P57 Configurations
87
Port 6
88
P60 to P67 Configurations
88
Port 7
89
P70, P71 Configurations
89
Port Function Control Registers
90
Port Mode Register Format
91
Pull-Up Resistor Option Register (PU0, PU2, PU4 to PU7) Format
92
Port Function Register (PF2) Format
93
Key Return Mode Register (KRM)
94
Port Function Operations
95
Writing to Input/Output Port
95
Reading to Input/Output Port
95
Chapter 6 Clock Generator
97
Clock Generator Functions
97
Clock Generator Configuration
98
Clock Generator Control Register
99
System Clock Oscillator
100
Main System Clock Oscillator
100
Subsystem Clock Oscillator
101
When no Subsystem Clocks Are Used
103
Clock Generator Operations
104
Main System Clock Operations
105
Subsystem Clock Operations
106
Changing System Clock and CPU Clock Settings
107
Time Required for Switchover between System Clock and CPU Clock
107
Maximum Time Required for CPU Clock Switchover
107
System Clock and CPU Clock Switching Procedure
108
Chapter 7 Main Clock Monitor
110
Main Clock Monitor Function
110
Main Clock Monitor Circuit Configuration
110
Main Clock Monitor Configuration
110
Main Clock Monitor Control Register
111
Chapter 8 16-Bit Timer/Counter TM0
113
16-Bit Timer/Event Counter Function
113
16-Bit Timer/Event Counter Configuration
114
Configuration of 16-Bit Timer/Event Counter (TM0)
114
Valid Edge of TI00 Pin and Valid Edge of Capture Trigger of Capture/Compare Register
116
Valid Edge of TI01 Pin and Valid Edge of Capture Trigger of Capture/Compare Register
116
16-Bit Timer/Event Counter Control Register
118
16-Bit Timer/Event Counter Operations
125
Operation as Interval Timer (16 Bits)
125
PPG Output Operation
127
Pulse Width Measurement
128
Operation as External Event Counter
135
Operation to Output Square Wave
137
Operation to Output One-Shot Pulse
139
16-Bit Timer/Event Counter Operating Precautions
144
Chapter 9 16-Bit Timer 2 TM2
148
16-Bit Timer 2 Functions
148
16-Bit Timer 2 Configuration
149
Timer 2 Configuration
149
16-Bit Timer 2 Control Registers
150
16-Bit Timer 2 Operations
153
Pulse Width Measurement Operations
153
16-Bit Timer 2 Precautions
156
Chapter 10 8-Bit Timer/Event Counters 50 and 51
158
8-Bit Timer/Event Counters 50 and 51 Functions
158
8-Bit Operation Modes
159
8-Bit Timer/Event Counter 50 Interval Times
159
8-Bit Timer/Event Counter 51 Interval Times
159
8-Bit Timer/Event Counter 50 Square-Wave Output Ranges
160
8-Bit Timer/Event Counter 51 Square-Wave Output Ranges
160
16-Bit Operation Modes
161
16-Bit Timer/Event Counter TM50/TM51 Interval Times
161
16-Bit Timer/Event Counter TM50/TM51 Square-Wave Output Ranges
161
8-Bit Timer/Event Counters 50 and 51 Configurations
162
8-Bit Timer/Event Counters 50 and 51 Control Registers
165
8-Bit Timer/Event Counters 50 and 51 Operations
170
Interval Timer Operations (8-Bit Timer/Event Counter Mode)
170
8-Bit Timer/Event Counter 50 Interval Times (8-Bit Timer/Event Counter Mode)
173
8-Bit Timer/Event Counter 51 Interval Times (8-Bit Timer/Event Counter Mode)
173
External Event Counter Operation
174
Square Wave Output
175
8-Bit Timer/Event Counters 50 Square-Wave Output Ranges (8-Bit Timer/Event Counter Mode)
176
PWM Output Operations
177
Operation as Interval Timer (16-Bit Operation)
180
Cautions on 8-Bit Timer/Event Counters 50 and 51
183
Chapter 11 Watch Timer
186
Watch Timer Functions
186
Watch Timer Configuration
187
Watch Timer Mode Register (WTM)
188
Watch Timer Operations
189
Watch Timer Operation
189
Interval Timer Operation
189
Chapter 12 Watchdog Timer
192
Watchdog Timer Functions
192
Watchdog Timer Configuration
193
Watchdog Timer Control Registers
194
Watchdog Timer Operations
196
Watchdog Timer Operation
196
Interval Timer Operation
197
Chapter 13 Clock Output Control Circuit
199
Clock Output Control Circuit Functions
199
Clock Output Control Circuit Configuration
200
Clock Output Function Control Registers
201
Chapter 14 A/D Converter
204
A/D Converter Functions
204
A/D Converter Configuration
205
A/D Converter Control Registers
207
A/D Converter Operations
210
Basic Operations of A/D Converter
210
Input Voltage and Conversion Result
212
A/D Converter Operation Mode
213
A/D Converter Precautions
215
Cautions on Emulation
218
D/A Converter Mode Register (DAM0)
218
Chapter 15 Serial Interface Outline
220
Serial Interface Outline
220
Chapter 16 Serial Interface Channel 20
222
Serial Interface Channel 20 Functions
222
Serial Interface Channel 20 Configuration
224
Serial Interface Channel 20 List of Sfrs (Special Function Registers)
225
Serial Interface Control Registers
226
Serial Interface Operations
229
Operation Stop Mode
229
3-Wire Serial I/O Mode
230
Chapter 17 Serial Interface UART
239
Serial Interface UART Functions
239
Serial Interface UART Configuration
240
List of Sfrs (Special Function Registers)
241
Serial Interface Control Registers
241
Serial Interface Operations
245
Operation Stop Mode
245
Asynchronous Serial Interface (UART) Mode
245
Standby Function
257
Chapter 18 CAN Controller
259
Protocol
260
Protocol Mode Function
260
Message Format
260
Data Frame/Remote Frame
261
Error Frame
266
Overload Frame
267
Function
268
Bus Priority Decision
268
Bit Stuffing
268
Multi Master
268
Multi Cast
268
Sleep Mode/Stop Function
268
Error Control Function
269
Baud Rate Control Function
272
State Shift Chart
275
Outline Description
278
Connection with Target System
278
CAN Module Configuration
279
Operation
280
Special Function Register for CAN-Module
280
Message and Buffer Configuation
281
Transmit Buffer Structure
282
Transmit Message
283
Transmit Structure
287
Receive Message
288
Mask Function
294
Can
298
Status Register
298
CAN Error Status Register
301
Baudrate Generation
308
Function Control
313
Transmit Control
313
Receive Control
315
Mask Control
316
Special Functions
318
Interrupt Information
320
Interrupt Vectors
320
Transmit Interrupt
320
Receive Interrupt
320
Error Interrupt
320
Standby Function
321
CPU Halt Mode
321
CPU Stop Mode
321
DCAN Sleep Mode
321
DCAN Stop Mode
321
Functional Description by Flowcharts
322
Initialization
322
Prepare Transmit
323
Abort Transmit
324
Handling by the DCAN
325
Receive Event Oriented
326
Receive Task Oriented
327
Chapter 19 Interrupt Functions
329
Interrupt Function Types
329
Interrupt Sources and Configuration
330
Interrupt Function Control Registers
333
Interrupt Servicing Operations
339
Non-Maskable Interrupt Request Acknowledge Operation
339
Maskable Interrupt Request Acknowledge Operation
342
Software Interrupt Request Acknowledge Operation
344
Multiple Interrupt Servicing
345
Interrupt Request Reserve
348
Chapter 20 Key Return Mode
350
Key Return Mode Functions
350
Key Return Mode Circiut Configuration
350
Key Return Mode Control Registers
351
Chapter 21 Standby Function
353
Standby Function and Configuration
353
Standby Function
353
Standby Function Control Register
354
Standby Function Operations
355
HALT Mode
355
STOP Mode
358
Chapter 22 Reset Function
362
Reset Function
362
Chapter 23 Μpd78F0818
368
Memory Size Switching Register (IMS)
369
Internal Extension RAM Size Switching Register
370
Flash Memory Programming
371
Selection of Transmission Method
371
Initialization of the Programming Mode
371
Flash Memory Programming Function
372
Flashpro Connection
372
Flash Programming Precautions
373
Chapter 24 Instruction Set
375
Legends Used in Operation List
376
Operands Identifiers and Description Mode
376
Description of "Operation" Column
377
Description of "Flag Operation" Column
377
Operation List
378
Instructions Listed by Addressing Type
386
Appendix A Development Tools
391
Language Processing Software
392
Flash Memory Writing Tools
393
Debugging Tools
393
Hardware
393
Software
394
OS for IBM PC
396
Development Environment When Using IE-78001-R-A
397
Appendix B Embedded Software
399
Real-Time os (2/2)
400
Fuzzy Inference Development Support System
402
Appendix C Register Index
404
Register Index (in Alphabetical Order with Respect to Register Names)
404
Register Index (in Alphabetical Order with Respect to Register Symbol)
407
Appendix D Revision History
410
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