Microchip Technology EVB-LAN9696-24port Manuals

Microchip Technology EVB-LAN9696-24port Manuals

Manuals and User Guides for Microchip Technology EVB-LAN9696-24port. We have 1 Microchip Technology EVB-LAN9696-24port manual available for free PDF download: Hardware Manual

Microchip Technology EVB-LAN9696-24port Hardware Manual

Microchip Technology EVB-LAN9696-24port Hardware Manual (70 pages)

Brand: Microchip Technology | Category: Motherboard | Size: 9 MB

Table of Contents

Table of Contents
3
Preface

7
Chapter 1. Overview

11
- Introduction
  11
- Audience
  11
- References
  11
  - Microchip Documents
    11
  - IEEE Standards
    11
  - Optical) Module Standards
    11
- Acronyms and Definitions
  12
Chapter 2. EVB-LAN9696 Reference Board

13
- Introduction
  13
- Board Features
  13
- Board Design
  14
- CPU Sub-System
  14
  - Embedded CORTEX-ARM53 CPU System
    14
  - External CPU Connector
    14
- Management
  15
- Copper Phys
  15
- Optional Ultra-Poe Feature Connector
  15
- Timing and Synchronization
  15
  - Synce
    15
  - Ptp/Ieee1588V2/802.1As-2020
    16
- Power
  16
Chapter 3. Management Software

19
Chapter 4. LED Indicators and Board Connector

27
- Front Bracket Layout
  27
- Rear-Side Layout
  28
  - USB Type-C ® Serial Port
    28
  - SMA Connectors
    28
  - Pcie 2.0 - Oculink Connector
    28
  - ULPI USB 2.0 Host
    28
- Management Port and Status LED
  29
- RS-422 Serial Time Synchronization Interface
  29
- Reset
  29
- Power Select Switch
  29
- Additional On-Board Connectors
  29
  - Expansion Header
    29
  - Ultra Poe Connector
    30
  - ARM CPU JTAG Connector
    30
  - QSPI Flash Program Header
    30
  - DPLL Programming Header
    30
  - On-Die Temperature Sensor Header
    30
  - FAN Connector
    30
- Boot Mode and Reference Clock
  31
Chapter 5. Detailed Hardware Description

33
- Block Diagram
  33
- Vcore-IV CPU Sub-System
  34
  - Vcore Configuration Strapping
    34
  - LCPLL Configuration Strapping
    34
  - Ddr4 Sdram
    35
  - Emmc NAND Flash
    35
  - QSPI nor Flash
    35
  - QSPI Flash Programming
    35
  - ARM CPU JTAG Header
    36
  - FLEXCOM Usage
    37
    
    UART for TF-A Monitor and CLI Management
    37
    
    Si Interface for Dpll Control
    38
    
    UART for IEEE 1588 Time Interface - RJ45 G.703 Pinout
    38
    
    I 2 C Interface
    39
  - ULPI USB 2.0 Host
    39
  - Serial GPIO Controller
    40
  - MII-Management Bus Interface
    42
    
    PHY Interrupts
    42
  - Adjustable FAN Speed and RPM Monitoring
    42
  - LAN9696 GPIO Usage
    43
- Switch Core
  45
  - Network Ports
    45
  - Copper Phys
    45
    
    Media Side Interface
    45
    
    Integrated <Magnetics - ICM
    46
    
    PHY GPIO Usage
    46
    
    Port Leds
    46
  - SFP+, SFI Interfaces
    47
  - Pcie 2.0 End-Point
    47
- Reset Circuitry
  48
- Reference Clocks, Synchronization, and PTP
  49
- Ultra Poe Feature Connectors
  52
  - Expansion Header
    53
  - Power Distribution
    54
    
    48/56V Input
    54
    
    DC/DC Converters
    54
    
    Power Supply Sequencing
    56
    
    Power Supply, Test Points
    56
Chapter 6. Environmental Requirements

57
- Storage and Operating Conditions
  57
Appendix A. PCB Layout

59
- Dimension
  59
- PCB Layers
  59
  - Layer 1 - Top Plane
    60
  - Layer 2 - Ground Plane
    61
  - Layer 3
    61
  - Layer 4
    62
  - Layer 5 - Power Plane 2
    62
  - Layer 6 - Signal Plane 2
    63
  - Layer 7 - Ground Plane 2
    63
  - Layer 8
    64
  - DDR4 Close-Up on Top Layer
    65
  - DDR4 Close-Up on Signal Plane 1
    65
  - DDR4 Close-Up on Signal Plane 2
    66
  - DDR4 Close-Up on Bottom Layer
    66
- PCB Layer Stack-Up
  67
  - PCB Trace Widths, Clearance, and Impedance
    67
Worldwide Sales and Service

70

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