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iWave iW-RainboW-G47M manual available for free PDF download: Hardware User's Manual
iWave iW-RainboW-G47M Hardware User's Manual (95 pages)
Kintex Ultrascale+ FPGA SOM
Brand:
iWave
| Category:
Single board computers
| Size: 4 MB
Table of Contents
Table of Contents
4
Introduction
8
Purpose
8
SOM Overview
8
List of Acronyms
8
Table 1: Acronyms & Abbreviations
8
Terminology Description
9
References
9
Table 2: Terminology
9
Architecture and Design
10
Kintex Ultrascale+ FPGA (KU19P) SOM Block Diagram
10
Figure 1: Kintex Ultrascale+ FPGA SOM Block Diagram
10
Kintex Ultrascale+ FPGA SOM Features
11
Kintex Ultrascale+ FPGA
14
FPGA & Design Information
14
Figure 2: Kintex Ultrascale+ FPGA Devices Comparison
14
FPGA Power
15
FPGA Reset
15
FPGA Reference Clock
16
FPGA Configuration & Status
17
Figure 3: Indication Leds
17
FPGA Mode Configuration
18
FPGA System Monitor/Adc
18
FPGA Memory
19
DDR4 SDRAM1 with ECC
19
DDR4 SDRAM2 with ECC
19
Layerscape Processor
20
Processor & Design Information
20
LS1021A Booting and Configuration
20
Figure 4: LS1021A Internal Block Diagram
20
Ls1021A Pmic
21
LS1021A Reference Clock
21
Processor Memory
22
DDR4 SDRAM with ECC for LS1021A
22
NOR Flash
22
Mram
22
Sram
22
FPGA to CPU Interfaces
23
Pciex1 Gen2
23
Rgmii
23
Uart
25
Interrupt Request Pins
25
Other on SOM Features
25
TPM Module
25
Temperature Sensor
26
Board to Board Connector1
27
Figure 5: Board to Board Connector1
27
Table 3: Board to Board Connector1 Pinout
28
LS1021A Interfaces
31
Usb3.0
31
Serdes Interface
31
Gpios from LS1021A
31
FPGA Interfaces
32
GTY High Speed Transceivers
32
FPGA Ios - HD BANK92
35
Power Control Input
40
Board to Board Connector2
41
Figure 6: Board to Board Connector2
41
Table 4: Board to Board Connector2 Pinout
42
LS1021A Interfaces
45
Gigabit Ethernet Interface
45
USB2.0 Interface
46
Debug UART Interface
46
Data UART Interface
47
I2C Interface
47
JTAG Interface
48
Serdes Interface
48
Gpios from LS1021A
49
FPGA Interfaces
50
FPGA Ios - HP BANK66,65
50
FPGA Ios -HP BANK67
55
Power & Reset Input
61
Board to Board Connector3
62
Figure 7: Board to Board Connector3
62
Table 5: Board to Board Connector3 Pinout
63
FPGA Interfaces
66
GTY High Speed Transceivers
66
Power
71
Board to Board Connector4
73
Figure 8: Board to Board Connector4
73
Table 6: Board to Board Connector4 Pinout
74
FPGA Interfaces
75
GTY High Speed Transceivers
75
Power
76
LS1021A Processor Pin Multiplexing on Board-To-Board Connectors
77
Table 7: LS1021A IOMUX on Kintex Ultrascale+ FPGA SOM
77
Technical Specification
85
Electrical Characteristics
85
Power Input Requirement
85
Table 8: Power Input Requirement
85
Power Input Sequencing
86
Figure 9: Power Input Sequencing
86
Table 9: Power Sequence Timing
86
Power Consumption
87
Environmental Characteristics
88
Temperature Specification
88
Rohs2 Compliance
88
Electrostatic Discharge
88
Table 10: Temperature Specification
88
Heat Sink
89
Figure 10: Heat Sink
89
Mechanical Characteristics
90
Kintex Ultrascale+ FPGA SOM Mechanical Dimensions
90
Figure 11: Mechanical Dimension of Kintex Ultrascale+ FPGA SOM - Top View
90
Figure 12: Mechanical Dimension of Kintex Ultrascale+ FPGA SOM - Bottom View
91
Figure 13: Mechanical Dimension of Kintex Ultrascale+ FPGA SOM - Side View
92
Ordering Information
93
Table 11: Orderable Product Part Numbers
93
Figure 14 Kintex Ultrascale+ FPGA (KU19P) Development Platform
94
Iwave Systems Technologies Pvt. Ltd
95
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