Intel Altera Agilex 7 F Series Manuals

Manuals and User Guides for Intel Altera Agilex 7 F Series. We have 1 Intel Altera Agilex 7 F Series manual available for free PDF download: User Manual

Intel Altera Agilex 7 F Series User Manual

Intel Altera Agilex 7 F Series User Manual (89 pages)

FPGA (2xF-Tiles)

Brand: Intel | Category: Microcontrollers | Size: 4 MB

Table of Contents

Table of Contents
2
Overview
4
Related Information
4
Block Diagram
5
Feature Summary
6
Box Contents
7
Recommended Operating Conditions
8
Getting Started
9
Before You Begin
9
Handling the Board
9
Quartus ® Prime Software and Driver Installation
9
Installing the Quartus Prime Pro Edition Software
10
Installing the Development Kit
11
Installing the Intel FPGA Download Cable II Driver
11
Development Kit Setup
13
Default Settings
13
Powering up the Development Board
14
Board Test System
16
Set up BTS GUI Running Environment
17
Downloading Openjdk
17
Downloading Openjfx
17
Installing Openjdk and Openjfx
17
Setting up the Quartus Prime Software for BTS Operation
18
Running the BTS GUI
18
Test the Functionality of the Development Kit
20
The Bottom Info Bar
20
The Configure Menu
20
The Sys Info Tab
22
The GPIO Tab
23
The XCVR Tab
25
PMA Setting
27
Error Control
28
The Memory Tab
31
Performance Indicators
32
Test Control
33
Control On-Board Clock through Clock Controller GUI
34
Related Information
35
Monitor On-Board Power Regulator through Power Monitor GUI
35
Data Record
36
BTS Test Areas
36
Identify Test Pass or Fail Based on BTS GUI Test Status
36
Development Kit Hardware and Configuration
38
JTAG Configuration Mode
38
Active Serial (AS) X4 Configuration Mode
38
Avalon Streaming Interface X16 Configuration Mode
38
Custom Projects for the Development Kit
40
Add Smartvid Settings in the Quartus Prime QSF File
40
Golden Top
40
Document Revision History for the Agilex 7 FPGA F-Series (2 × F-Tiles) Development Kit User Guide
41
Development Kit Components
43
Board Overview and Components
43
Board Overview
43
Board Components
43
Status Elements
45
MAX 10 CPLD System Controller
47
FPGA Configuration
47
Programming the FPGA over On-Board Intel FPGA Download Cable II
48
Programming the FPGA over an External Intel FPGA Download Cable II
48
Default Switch and Jumper Settings
49
Switch Description
49
Jumper Description
51
Input and Output Components
51
Push Buttons
51
Switches
51
Leds
52
Components and Interfaces
53
PCI Express (Pcie) Interface
53
QSFP-DD Interface
56
Related Information
57
QSFP Interface
57
CXL Interface
58
DDR4 DIMM1 Interface
59
DDR4 DIMM2 Interface
65
DDR4 Component Interface
70
HPS IO48 Interface
73
I 2 C Block Diagram
75
MAX 10 SPI Bus
76
Clock Circuits
76
HPS Daughter Card
77
System Power
80
Power Guidelines
80
In a Standard Pcie-Compliant System
80
As a Standalone Evaluation Board Powered by Included Power Supply
80
Power Distribution System
81
Power Measurement
82
Thermal Limitations and Protection
82
Developer Resources
83
Safety and Regulatory Compliance Information
84
Safety and Regulatory Information
84
Safety Warnings
85
Power Cord Requirements
86
Safety Cautions
86
Cooling Requirements
87
Electromagnetic Interference (Emi)
87
Electrostatic Discharge (ESD) Warning
88
Compliance Information
89
CE EMI Conformity Caution
89

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