Hitachi H8/3813U Manuals

Manuals and User Guides for Hitachi H8/3813U. We have 1 Hitachi H8/3813U manual available for free PDF download: Hardware Manual

Hitachi H8/3813U Hardware Manual (401 pages)

Brand: Hitachi | Category: Computer Hardware | Size: 1 MB

Table of Contents
3
Overview
10
Internal Block Diagram
14
Pin Arrangement and Functions
15
Pin Arrangement
15
Pin Functions
17
Cpu
22
Overview
22
Features
22
Address Space
23
Register Configuration
23
Register Descriptions
24
General Registers
24
Control Registers
24
Initial Register Values
26
Data Formats
26
Data Formats in General Registers
27
Memory Data Formats
28
Addressing Modes
29
Effective Address Calculation
31
Instruction Set
35
Data Transfer Instructions
37
Arithmetic Operations
39
Logic Operations
40
Shift Operations
40
Bit Manipulations
42
Branching Instructions
46
System Control Instructions
48
Block Data Transfer Instruction
49
Basic Operational Timing
51
Access to On-Chip Memory (RAM, ROM)
51
Access to On-Chip Peripheral Modules
52
CPU States
54
Overview
54
Program Execution State
55
Program Halt State
55
Exception-Handling State
55
Memory Map
56
LCD RAM Address Relocation
57
Application Notes
58
Notes on Data Access
58
Notes on Bit Manipulation
60
Notes on Use of the EEPMOV Instruction
66
Exception Handling
67
Overview
67
Reset
67
Reset Sequence
67
Interrupt Immediately after Reset
69
Interrupts
70
Overview
70
Interrupt Control Registers
72
External Interrupts
80
Internal Interrupts
81
Interrupt Operations
82
Interrupt Response Time
87
Application Notes
88
Notes on Stack Area Use
88
Notes on Rewriting Port Mode Registers
89
Clock Pulse Generators
91
Overview
91
Block Diagram
91
System Clock and Subclock
91
System Clock Generator
92
Subclock Generator
95
Prescalers
98
Note on Oscillators
99
Power-Down Modes
100
Overview
100
System Control Registers
103
Sleep Mode
106
Transition to Sleep Mode
106
Clearing Sleep Mode
106
Standby Mode
107
Transition to Standby Mode
107
Clearing Standby Mode
107
Oscillator Settling Time after Standby Mode Is Cleared
107
Transition to Standby Mode and Port Pin States
108
Watch Mode
109
Transition to Watch Mode
109
Clearing Watch Mode
109
Oscillator Settling Time after Watch Mode Is Cleared
109
Subsleep Mode
110
Transition to Subsleep Mode
110
Clearing Subsleep Mode
110
Subactive Mode
111
Transition to Subactive Mode
111
Clearing Subactive Mode
111
Operating Frequency in Subactive Mode
111
Active (Medium-Speed) Mode
112
Transition to Active (Medium-Speed) Mode
112
Clearing Active (Medium-Speed) Mode
112
Operating Frequency in Active (Medium-Speed) Mode
112
Direct Transfer
113
Direct Transfer Overview
113
Calculation of Direct Transfer Time before Transition
114
Rom
117
Overview
117
Block Diagram
117
Ram
118
Overview
118
Block Diagram
118
I/O Ports
119
Overview
119
Port 1
121
Overview
121
Register Configuration and Description
121
Pin Functions
125
Pin States
127
MOS Input Pull-Up
127
Port 2
128
Overview
128
Port 3
128
Pin Functions
132
Pin States
132
Port 4
133
Overview
133
Register Configuration and Description
133
Pin Functions
136
Pin States
137
Port 5
138
Overview
138
Pin Functions
140
Pin States
141
Port 6
142
Overview
142
Pin Functions
145
Pin States
146
MOS Input Pull-Up
146
Port 7
147
Overview
147
Register Configuration and Description
147
Pin Functions
149
Pin States
149
Port 8
151
Overview
151
Register Configuration and Description
151
Pin Functions
153
Pin States
153
Port 9
154
Overview
154
Register Configuration and Description
154
Pin Functions
156
Pin States
164
Port B
165
Overview
165
Register Configuration and Description
165
Port C
166
Overview
166
Register Configuration and Description
166
Timers
167
Overview
167
Timer a
168
Overview
168
Register Descriptions
170
Timer Operation
172
Timer a Operation States
173
Timer F
174
Overview
174
Register Descriptions
176
Interface with the CPU
183
Timer Operation
187
Application Notes
190
Timer G
192
Overview
192
Register Descriptions
194
Noise Canceller Circuit
198
Timer Operation
199
Application Notes
203
Sample Timer G Application
207
Serial Communication Interface
208
Overview
208
Sci1
209
Overview
209
Register Descriptions
211
Operation
216
Interrupts
220
Application Notes
220
Sci3
221
Overview
221
Register Descriptions
224
Operation
242
Operation in Asynchronous Mode
246
Operation in Synchronous Mode
254
Multiprocessor Communication Function
261
Interrupts
267
Application Notes
268
A/D Converter
273
Overview
273
Block Diagram
273
A/D Result Register (ADRR)
273
A/D Mode Register (AMR)
273
Register Descriptions
275
A/D Start Register (ADSR)
277
Operation
278
A/D Conversion Operation
278
Start of A/D Conversion by External Trigger Input
278
Interrupts
279
Typical Use
279
Application Notes
282
LCD Controller/Driver
283
Overview
283
Features
283
Block Diagram
284
Pin Configuration
285
Register Configuration
285
LCD Port Control Register (LPCR)
285
LCD Control Register (LCR)
288
Operation
290
Settings Prior to LCD Display
290
Relation of LCD RAM to Display
291
Connection to HD66100
292
Operation in Power-Down Modes
299
Boosting the LCD Driver Power Supply
300
Power Supply Voltage and Operating Range
302
DC Characteristics
304
AC Characteristics
309
A/D Converter Characteristics
312
LCD Characteristics
313
Operation Timing
314
Output Load Circuit
318
Appendix A CPU Instruction Set
319
Instructions
319
Operation Code Map
327
Number of Execution States
329
Appendix B On-Chip Registers
336
I/O Registers (1)
336
I/O Registers (2)
339
Appendix C I/O Port Block Diagrams
376
Schematic Diagram of Port 1
376
Schematic Diagram of Port 2
381
Schematic Diagram of Port 3
383
Schematic Diagram of Port 4
387
Schematic Diagram of Port 5
390
Schematic Diagram of Port 6
391
Schematic Diagram of Port 7
392
Schematic Diagram of Port 8
393
Schematic Diagram of Port 9
394
Schematic Diagram of Port a
395
Schematic Diagram of Port B
396
Schematic Diagram of Port C
396
Appendix D Port States in the Different Processing States
397
Appendix E Product Code Lineup
398
Appendix F Package Dimensions
399

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