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Vinculum II VNC2-32Q1B
FTDI Vinculum II VNC2-32Q1B Controller Manuals
Manuals and User Guides for FTDI Vinculum II VNC2-32Q1B Controller. We have
1
FTDI Vinculum II VNC2-32Q1B Controller manual available for free PDF download: Manual
FTDI Vinculum II VNC2-32Q1B Manual (88 pages)
Embedded Dual USB Host Controller IC
Brand:
FTDI
| Category:
Controller
| Size: 2 MB
Table of Contents
Table of Contents
4
Typical Applications
2
Table 1.1 Part Numbers
2
Part Numbers
2
USB Compliant
2
VNC2 Block Diagram
3
Figure 2.1 Simplified VNC2 Block Diagram
3
Table of Contents
4
Device Pin out and Signal Description Summary
7
Pin out - 32 Pin LQFP
7
Figure 3.1 32 Pin LQFP - Top down View
7
Pin out - 32 Pin QFN
8
Figure 3.2 32 Pin QFN - Top down View
8
Figure 3.3 48 Pin LQFP - Top down View
9
Pin out - 48 Pin QFN
9
Pin out - 48 Pin LQFP
9
Pin out - 64 Pin LQFP
10
Figure 3.4 48 Pin QFN - Top down View
10
Figure 3.5 64 Pin LQFP - Top down View
11
Pin out - 64 Pin QFN
12
VNC2 Schematic Symbol 32 Pin
12
Figure 3.6 64 Pin QFN - Top down View
12
Figure 3.7 Schematic Symbol 32 Pin
13
Figure 3.8 Schematic Symbol 48 Pin
14
VNC2 Schematic Symbol 48 Pin
14
Figure 3.9 Schematic Symbol 64 Pin
15
VNC2 Schematic Symbol 64 Pin
15
Pin Configuration USB and Power
16
Table 3.1 USB Interface Group
16
Table 3.2 Power and Ground
16
Miscellaneous Signals
17
Table 3.3 Miscellaneous Signal Group
17
Pin Configuration Input / Output
18
Table 3.4 Default I/O Configuration
20
Flash Module
21
Flash Programming Module
21
Function Description
21
Embedded CPU
21
Functional Block Descriptions
21
Key Features
21
Input / Output Multiplexer Module
22
Table 4.1 - Peripheral Pin Requirements
22
Power Saving Modes and Standby Mode
23
USB Host / Device Controllers
23
12Mhz Oscillator
23
USB Transceivers 0 and 1
23
Peripheral Interface Modules
23
RAM Module
23
Peripheral DMA Modules 0, 1, 2 & 3
23
O Multiplexer
24
Figure 5.1 IOBUS to Group Relationship-64 Pin
25
Figure 5.2 IOBUS to UART, SPI Slave0 and SPI Master Example
26
Figure 5.3 IOBUS to UART, SPI Slave0 and SPI Master Second Example
27
Figure 5.4 IOBUS to UART, SPI Slave0 and SPI Master Third Example
28
I/O Peripherals Signal Names
29
Table 5.1 I/O Peripherals Signal Names
29
Figure 5.5 VNC2 Toolchain App Wizard Showing Iomux Configuration
30
I/O Mux Group 0
30
I/O Multiplexer Configuration
30
I/O Mux Group 1
31
Table 5.2 Group 0
31
I/O Mux Group 2
32
Table 5.3 Group 1
32
Table 5.4 Group 2
33
I/O Mux Group 3
34
Table 5.5 Group 3
34
I/O Mux Interface Configuration Example
35
Figure 5.6 UART Example 64 Pin
35
Figure 6.2 UART Transmit Waveform
36
UART Interface
36
Figure 6.1 UART Receive Waveform
36
Peripheral Interfaces
36
UART Mode Signal Descriptions
37
Table 6.1 Data and Control Bus Signal Mode Options - UART Interface
38
Serial Peripheral Interface - SPI Modes
39
Table 6.2 SPI Signal Names
39
SPI Clock Phase Modes
40
Table 6.3 - SPI Slave Speeds
40
Table 6.4 - Clock Phase/Polarity Modes
40
Figure 6.4 SPI Slave Block Diagram
41
Figure 6.3 - SPI CPOL CPHA Function
41
Serial Peripheral Interface - Slave
41
SPI Slave Signal Descriptions
42
Table 6.5 Data and Control Bus Signal Mode Options - SPI Slave Interface
42
Full Duplex
43
Figure 6.5 Full Duplex Data Master Write
43
Figure 6.6 Full Duplex Data Master Read
43
Table 6.6 SPI Command and Status Fields
44
Figure 6.7 SPI Command and Status Structure
44
Half Duplex, 4 Pin
45
Figure 6.8 Half Duplex Data Master Write
45
Figure 6.9 Half Duplex Data Master Read
45
Figure 6.11 Half Duplex 3-Pin Data Master Read
46
Figure 6.10 Half Duplex 3-Pin Data Master Write
46
Half Duplex, 3 Pin
46
Figure 6.12 Unmanaged Mode Transfer Diagram
47
Unmanaged Mode
47
VNC1L Legacy Interface
48
Figure 6.13 VNC1L Mode Data Write
48
Figure 6.14 VNC1L Mode Data Read
48
Table 6.7 SPI Command and Status Fields
49
Table 6.8 SPI Setup Bit Encoding
49
Figure 6.15 VNC1L Compatible SPI Command and Status Structure
49
Table 6.9 SPI Slave Data Timing
50
Figure 6.16 SPI Slave Mode Timing
50
Figure 6.17 SPI Master Data Read (VNC2 Slave Mode)
51
Table 6.10 SPI Master Data Read Status Bit
51
Table 6.11 SPI Master Data Write Status Bit
51
Table 6.12 SPI Status Read Byte - Bit Descriptions
52
Figure 6.18 SPI Slave Mode Data Write
52
Figure 6.19 SPI Slave Mode Status Read
52
Serial Peripheral Interface - SPI Master
53
SPI Master Signal Descriptions
53
Figure 6.20 SPI Master Block Diagram
53
Table 6.13 SPI Master Signal Names
54
Table 6.14 SPI Master Timing
54
Figure 6.21 Typical SPI Master Timing
55
Debugger Interface
56
Debugger Interface Signal Description
56
Table 6.15 Debugger Signal Name
56
Parallel FIFO - Asynchronous Mode
57
FIFO Signal Descriptions
57
Read / Write Transaction Asynchronous FIFO Mode
59
Table 6.16 Data and Control Bus Signal Mode Options - Parallel FIFO Interface
59
Table 6.17 Asynchronous FIFO Mode Read / Write Timing
60
Figure 6.22 Asynchronous FIFO Mode Read / Write Cycle
60
Parallel FIFO - Synchronous Mode
61
Table 6.18 Synchronous FIFO Control Signals
61
Read / Write Transaction Synchronous FIFO Mode
62
Figure 6.23 Synchronous FIFO Mode Read / Write Cycle
62
General Purpose Timers
63
Pulse Width Modulation
63
Table 6.19 Synchronous FIFO Mode Read / Write Timing
63
General Purpose Input Output
64
Figure 6.24 PWM - Timing Diagram
64
Figure 6.25 GPIO Port Groups
64
USB Interfaces
65
Figure 7.1 USB Modes
65
Firmware - Software Development Toolchain
66
Rtos
66
Device Drivers
66
Firmware
66
Precompiled Firmware
67
Device Characteristics and Ratings
68
Absolute Maximum Ratings
68
Table 9.1 Absolute Maximum Ratings
68
DC Characteristics
69
Table 9.2 Operating Voltage and Current
69
Table 9.3 I/O Pin Characteristics
69
Table 9.4 USB I/O Pin (USBDP, USBDM) Characteristics
70
Table 9.5 Crystal Oscillator 1.8 Volts DC Characteristics
70
ESD and Latch-Up Specifications
71
Table 9.6 ESD and Latch-Up Specifications
71
Application Examples
72
Example VNC2 Schematic (MCU - UART Interface)
72
Figure 10.1 VNC2 Schematic (MCU - UART Interface)
72
Package Parameters
73
VNC2 Package Markings
73
Figure 11.1 Package Markings
73
Figure 11.2 Markings - 32 QFN
73
VNC2, LQFP-32 Package Dimensions
74
Figure 11.3 LQFP-32 Package Dimensions
74
VNC2, QFN-32 Package Dimensions
75
Figure 11.4 QFN-32 Package Dimensions
75
VNC2, LQFP-48 Package Dimensions
76
Figure 11.5 LQFP-48 Package Dimensions
76
VNC2, QFN-48 Package Dimensions
77
VNC2, LQFP-64 Package Dimensions
78
Figure 11.6 64 Pin LQFP Package Details
78
VNC2, QFN-64 Package Dimensions
79
Solder Reflow Profile
79
Figure 11.7 64 Pin QFN Package Details
79
Figure 11.8 All Packages Reflow Solder Profile
80
Table 11.1 Reflow Profile Parameter Values
81
Table 11.2 Package Reflow Peak Temperature
81
Contact Information
82
Appendix A - References
83
Application, Technical Notes and Toolchain Download Links
83
Acronyms and Abbreviations
84
Table 0.1 Acronyms and Abbreviations
84
Appendix B - List of Figures and Tables
85
List of Tables
85
List of Figures
86
Appendix C - Revision History
88
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