Force SYS68K/CPU-30 R4 Manuals

Manuals and User Guides for Force SYS68K/CPU-30 R4. We have 1 Force SYS68K/CPU-30 R4 manual available for free PDF download: Technical Reference Manual

Force SYS68K/CPU-30 R4 Technical Reference Manual

Force SYS68K/CPU-30 R4 Technical Reference Manual (209 pages)

Brand: Force | Category: Motherboard | Size: 1 MB

Table of Contents

Table of Contents
2
1 Introduction

14
- Getting Started
  14
  - SYS68K/CPU-30 R4 Technical Reference Manual Set
    14
  - Overview of the Manual
    14
- Overview of the SYS68K/CPU-30 R4
  15
  - Features of the CPU-30 R4
    15
  - Duscc
    18
- Specifications
  20
- Table 1. Specifications for the CPU-30 R4 Board
  20
- Ordering Information
  22
- Table 2. Ordering Information
  22
- History of Manual Publication
  23
- Table 3. History of Manual
  23
2 Installation

24
- Introduction
  24
  - Caution
    24
  - Board Installation
    25
- Location Diagrams of the SYS68K/CPU-30 R4 Board
  25
- Default Switch Settings
  28
- Table 4. Default Switch Settings
  28
- Front Panel
  31
  - Table 5. Front Panel Layout
    31
  - Figure 3. Front Panel
    32
  - RESET and ABORT Keys
    33
  - Status Leds
    33
  - Two Rotary Switches
    33
  - Voltage Sensor
    33
  - Watchdog Timer
    33
- Serial I/O Channels
  34
- Table 6. 9-Pin D-Sub Connector Pinout (RS-232)
  34
- AUI-Ethernet
  35
- Table 7. 15-Pin AUI-Ethernet Connector
  35
- Scsi
  36
- Parallel I/O (Option)
  36
- Connector Pinout for Vmebus P2
  37
- Table 8. Signal Assignment of the VME P2 Connector
  37
- Introduction to VMEPROM Firmware
  38
  - Booting up VMEPROM
    38
  - Table 9. Rotary Switches
    38
- The SYS68K/IOBP-1
  39
- Table 10. SYS68K/IOBP-1 Pin Assignment
  39
3 Hardware Description

42
- SYS68K/CPU-30 R4 Memory Map
  43
- Table 11. SYS68K/CPU-30 R4 Memory Map
  43
- The CPU 68030 Processor
  45
- The Floating Point Coprocessor (FPCP)
  47
  - Features of the 68882
    47
  - Interfacing to the 68882
    48
  - Addressing the 68882
    49
  - FPCP ID Number
    49
  - Detection of the 68882
    49
  - Summary of the 68882
    49
- The Local Bus
  50
  - The FGA-002 Gate Array
    50
  - Shared DRAM
    50
    
    Bank Selection of DRAM
    51
    
    Table 13. Used Device Types for the Shared Memory
    51
  - Board Type with Memory Capacity
    52
  - Reading the Shared RAM Capacity
    53
  - Shared RAM Addressing
    53
  - Shared RAM Performance
    53
- The System PROM Area
  55
- The Boot PROM
  58
- The Local SRAM Memory
  63
- The Real-Time Clock (RTC) 72423
  67
  - Address Map of the RTC Registers
    67
  - RTC Programming
    67
  - Table 16. RTC Register Layout
    67
  - RTC Programming Example
    68
  - Backup Power for the RTC
    69
- Summary of the RTC
  70
- The DUSCC 68562
  71
- The PI/T 68230
  81
- Function Switches and Indication Leds
  105
  - RESET Function Switch
    105
  - ABORT Function Switch
    105
  - Run" Led
    105
  - Bm" Led
    106
  - Rotary Switches
    106
  - Reserved Switches
    106
- The CPU Board Interrupt Structure
  107
- Vmebus Interface
  108
- Vmebus Master Interface
  109
- Vmebus Slave Interface
  114
  - The Access Address
    114
  - Data Transfer Size of the Shared RAM
    114
  - Address Modifier Decoding
    114
  - Table 36. Vmebus Slave am Codes
    114
- The Vmebus Interrupt Handler
  115
  - Vmebus IACK Daisy Chain Driver
    115
- Vmebus Arbitration
  116
  - Single-Level Vmebus Arbiter
    116
  - Vmebus Requester
    116
    
    1Release Every Cycle (REC)
    117
    
    2Release on Request (ROR)
    117
    
    3Release after Timeout (RAT)
    117
    
    Vmebus Release Modes
    117
    
    4Release on Bus Clear (RBCLR)
    118
    
    5Release When Done (RWD)
    118
    
    6Release on ACFAIL (ACFAIL)
    118
    
    7Summary of Release Modes
    119
    
    Table 37. Bus Release Functions
    119
    
    Vmebus Grant Driver
    119
  - Slot-1 Detection
    120
    
    Special Slot-1 Situation
    120
    
    Enabling the Arbiter
    121
    
    Slot-1 Status Register
    121
    
    The SYSCLK Driver
    122
    
    Vmebus Timer
    122
  - Exception Signals
    123
    
    The SYSFAIL* Signal
    123
    
    The SYSRESET* Signal
    123
    
    The ACFAIL* Signal
    124
  - Reset Generation
    125
    
    Front Panel Reset Switch
    125
    
    The RESET Instruction
    125
    
    Voltage Sensor Unit
    126
4 Circuit Schematics and Data Sheets

128
- Circuit Schematics of SYS68K/CPU-30 R4
  128
- List of Data Sheets
  129
  - Rtc 72421
    130
  - Duscc 68562
    131
  - Pi/T Ts68230
    132
  - Scsi 87033/34
    133
  - Fdc37C65C
    134
  - LANCE Am79C90
    135
  - SIA Am7992B
    136
  - Motorola MC68030 and MC68882
    137
5 Vmeprom

138
- General Information
  138
- Features of VMEPROM
  138
- Power-Up Sequence
  139
- Front Panel Switches
  140
  - RESET Switch
    140
  - ABORT Switch
    140
  - Control Switches (Rotary Switches)
    140
  - Table 38. Upper Rotary Switch (SW2)
    141
  - Table 39. Lower Rotary Switch (SW1)
    141
  - Table 40. RAM Disk Usage
    141
  - Table 41. Program after Reset
    142
  - Table 42. Boot an Operating System (if AUTOBOOT Is Selected)
    142
  - Table 43. Examples in Using the Rotary Switches
    142
  - Default Memory Usage of VMEPROM
    143
  - Default ROM Usage of VMEPROM
    143
  - Table 44. Main Memory Layout
    143
  - Table 45. Layout of System Flash Memory
    143
6 Devices and Interrupts Used by VMEPROM

146
- Addresses of the On-Board I/O Devices
  146
- On-Board Interrupt Sources
  146
- Table 46. On-Board I/O Devices
  146
- Table 47. On-Board Interrupt Sources
  146
- Off-Board Interrupt Sources
  147
- The On-Board Real-Time Clock
  147
- Table 48. Off-Board Interrupt Sources
  147
7 Concept of VMEPROM

148
- Getting Started
  148
- Command Line Syntax
  148
- VMEPROM Commands
  149
8 Special VMEPROM Commands for CPU Boards

150
- ARB - Set the Arbiter of the CPU Board
  150
- CONFIG - Search Vmebus for Hardware
  151
- FERASE - Erase Flash Memories
  152
- FGA - Change Boot Setup for Gate Array
  153
- FLUSH - Set Buffered Write Mode
  154
- FMB - FORCE Message Broadcast
  155
- FPROG - Program Flash Memories
  156
- Boot_Flash
  156
- (First) BOOT FLASH
  156
- BOOT_FLASH1 First BOOT FLASH BOOT_FLASH2 Second BOOT FLASH
  156
- Sys_Flash
  156
- System Flash
  156
- Flashoffset> Optional Relative Byte Offset Within the Flash Bank
  156
- FUNCTIONAL - Perform Functional Test
  157
- MEM - Set Data Bus Width of the Vmebus
  157
- SELFTEST - Perform On-Board Selftest
  158
- Installing a New Hard Disk
  159
9 Appendix To VMEPROM

162
- Driver Installation
  162
  - Vmebus Memory
    162
  - Sys68K/Sio-1/2
    162
  - Sys68K/Isio-1/2
    164
  - SYS68K/WFC-1 Disk Controller
    165
  - SYS68K/ISCSI-1 Disk Controller
    166
  - Local SCSI Controller
    166
- S-Record Formats
  167
  - S-Record Types
    167
- System RAM Definitions
  169
- Task Control Block Definitions
  172
- Interrupt Vector Table of VMEPROM
  175
- Benchmark Source Code
  178
- Modifying Special Locations in ROM
  184
- Table 49. User's Patch Table
  185
- Binding Applications to VMEPROM
  187
  - General Information
    187
  - Using External Memory
    187
  - Using System Flash Memory
    187
  - Binding the Application
    187
10 Special FGA Boot Commands

190
- Figure 6. Boot up Procedure
  191
  - Figure 7. Boot up Procedure (Continued)
    192
  - AS - Line Assembler
    193
  - CONT - Continue with Calling Routine
    194
  - DI - Disassembler
    195
  - DRAMINIT - Initialize DRAM
    195
  - FERASE - Erase Flash Memories
    196
  - Not Specified, the Whole Bank will be Erased
    196
  - Usage: FERASE <Flashbank>,[<Flashoffset>,<Length>]
    196
  - Boot_Flash1
    197
  - Boot_Flash2
    197
  - FPROG - Program Flash Memories
    197
  - GO - Go to Subroutine
    198
  - LO - Load S-Records to Memory
    199
  - NETLOAD - Load File Via Network to Memory
    200
  - NETSAVE - Save Data Via Network to File
    201
  - SETUP - Change Initialization Values
    202
  - SLOT - Change Slot Number and Vmebus Slave Address
    203
  - VMEADDR - Change Vmebus Slave Address
    203
11 The FGA Boot Utility Interface

205

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