Enclustra ME-XU1-9EG-1EES-D11E-R1.3 Manuals

Manuals and User Guides for Enclustra ME-XU1-9EG-1EES-D11E-R1.3. We have 1 Enclustra ME-XU1-9EG-1EES-D11E-R1.3 manual available for free PDF download: User Manual

Enclustra ME-XU1-9EG-1EES-D11E-R1.3 User Manual

Enclustra ME-XU1-9EG-1EES-D11E-R1.3 User Manual (66 pages)

SoC Module

Brand: Enclustra | Category: Control Unit | Size: 3 MB

Table of Contents

Table of Contents

3
- 1 Overview
  
  6
  - General
    6
  - Introduction
    6
  - Warranty
    6
  - Rohs
    6
  - Disposal and WEEE
    6
  - Safety Recommendations and Warnings
    6
  - Electrostatic Discharge
    7
  - Electromagnetic Compatibility
    7
  - Features
    7
  - Deliverables
    8
  - Accessories
    8
  - Reference Design
    8
  - Enclustra Build Environment
    8
  - Mercury+ PE1 Base Board
    9
  - Xilinx Tool Support
    9
- 2 Module Description
  
  10
  - Block Diagram
    10
    
    Hardware Block Diagram
    10
  - Module Configuration and Product Codes
    11
    
    Product Code Fields
    12
    
    Standard Module Configurations
    12
  - Article Numbers and Article Codes
    13
    
    Module Label
    13
    
    Article Numbers and Article Codes
    14
  - Top and Bottom Views
    15
  - Top View
    15
  - Bottom View
    15
    
    Module Top View
    15
    
    Module Bottom View
    15
  - Top and Bottom Assembly Drawings
    16
  - Top Assembly Drawing
    16
  - Bottom Assembly Drawing
    16
    
    Module Top Assembly Drawing
    16
    
    Module Bottom Assembly Drawing
    16
  - Module Footprint
    17
  - Mechanical Data
    17
    
    Module Footprint - Top View
    17
  - Module Connector
    18
    
    Pin Numbering for the Module Connector
    18
    
    Module Connector Types
    18
  - User I/O
    19
  - Pinout
    19
  - I/O Pin Exceptions
    20
    
    User I/Os
    20
    
    I/O Pin Exceptions - PERST
    20
    
    Assembly Options for MGT TX/RX Signals
    21
    
    I/O Pin Exceptions - Level Shifters
    21
    
    Assembly Options for MGT REFCLK Signals
    22
    
    Assembly Options for MGT Signals and Migration Guidelines
    22
  - Differential I/Os
    23
  - I/O Banks
    23
  - VCC_IO Usage
    24
    
    I/O Banks
    24
  - Signal Terminations
    25
  - Multiplexed I/O (MIO) Pins
    26
    
    MIO Pins Connections Overview
    27
  - Analog Inputs
    28
  - Multi-Gigabit Transceiver (MGT)
    28
    
    System Monitor (PL) Parameters
    28
    
    MGT Pairs
    29
  - Power
    30
  - Power Generation Overview
    30
    
    Generated Power Supplies
    31
    
    Power Converter Synchronization
    31
  - Power Enable/Power Good
    32
  - Voltage Supply Inputs
    33
  - Voltage Supply Outputs
    33
    
    Module Power Status and Control Pins
    33
  - Power Consumption
    34
  - Heat Dissipation
    34
    
    Heat Sink Type
    34
  - Voltage Monitoring
    35
  - Clock Generation
    35
    
    Voltage Monitoring Outputs
    35
  - Reset
    36
  - Leds
    36
    
    Module Clock Resources
    36
    
    Reset Resources
    36
    
    Ddr4 Sdram
    37
    
    DDR4 SDRAM Type
    37
    
    User Leds
    37
    
    Status Leds
    37
    
    Signal Description
    38
  - Termination
    38
  - Parameters
    38
    
    DDR4 SDRAM Types
    38
  - QSPI Flash
    39
  - QSPI Flash Type
    39
    
    DDR4 SDRAM Parameters
    39
  - Signal Description
    40
  - Configuration
    40
  - QSPI Flash Corruption Risk
    40
    
    QSPI Flash Type
    40
  - Emmc Flash
    41
  - Emmc Flash Type
    41
  - Signal Description
    41
  - SD Card
    41
  - Dual Gigabit Ethernet
    41
  - Ethernet PHY Type
    41
  - Signal Description
    42
    
    Gigabit Ethernet Phys Type
    42
    
    USB1/ETH1 Selection
    42
  - External Connectivity
    43
  - MDIO Address
    43
  - PHY Configuration
    43
  - RGMII Delays Configuration
    43
    
    Gigabit Ethernet Phys Configuration - Bootstraps
    43
  - Usb 2.0
    44
  - USB PHY Type
    44
  - Signal Description
    44
    
    Gigabit Ethernet Phys Configuration - RGMII Delays
    44
    
    USB 2.0 PHY Type
    44
  - Usb 3.0
    45
  - Display Port
    45
    
    USB 3.0 Implementation Example
    45
  - Real-Time Clock (RTC)
    46
  - Secure EEPROM
    46
  - EEPROM Type
    46
  - Debug Connector
    46
    
    Debug Connector Type
    47
    
    Debug Connector Interface - Revision 1 and 2 Modules
    48
- 3 Device Configuration
  
  49
- 4 I2C Communication
  
  57
  - Overview
    57
  - Signal Description
    57
  - I2C Address Map
    57
    
    I2C Signal Description
    57
  - Secure EEPROM
    58
  - Memory Map
    58
    
    I2C Addresses
    58
    
    EEPROM Sector 0 Memory Map
    58
    
    Product Information
    59
    
    Module Configuration
    59
    
    Mpsoc Device Types
    60
    
    Module Temperature Range
    60
- 5 Operating Conditions
  
  61
  - Absolute Maximum Ratings
    61
  - Recommended Operating Conditions
    62
List of Figures

64

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