User Manuals: Enclustra ME-SA2-D6-7I-D11 FPGA Module

Manuals and User Guides for Enclustra ME-SA2-D6-7I-D11 FPGA Module. We have 1 Enclustra ME-SA2-D6-7I-D11 FPGA Module manual available for free PDF download: User Manual

Enclustra ME-SA2-D6-7I-D11 User Manual

Enclustra ME-SA2-D6-7I-D11 User Manual (53 pages)

SoC Module

Brand: Enclustra | Category: Control Unit | Size: 3 MB

Table of Contents

Table of Contents

3
- Article Numbers and Article Codes
  3
- 1 Overview
  
  6
  - General
    6
  - Introduction
    6
  - Warranty
    6
  - Rohs
    6
  - Disposal and WEEE
    6
  - Safety Recommendations and Warnings
    6
  - Electrostatic Discharge
    7
  - Electromagnetic Compatibility
    7
  - Features
    7
  - Deliverables
    7
  - Accessories
    8
  - Reference Design
    8
  - Enclustra Build Environment
    8
  - Mercury+ PE1 Base Board
    8
  - Intel Tool Support
    9
- 2 Module Description
  
  10
  - Block Diagram
    10
    
    Hardware Block Diagram
    10
  - Module Configuration and Product Codes
    11
  - Article Numbers and Article Codes
    11
    
    Product Code Fields
    11
    
    Standard Module Configurations
    11
    
    Module Label
    12
  - Top and Bottom Views
    13
  - Top View
    13
  - Bottom View
    13
    
    Module Top View
    13
    
    Module Bottom View
    13
  - Top and Bottom Assembly Drawings
    14
  - Top Assembly Drawing
    14
  - Bottom Assembly Drawing
    14
    
    Module Top Assembly Drawing
    14
    
    Module Bottom Assembly Drawing
    14
  - Module Footprint
    15
  - Mechanical Data
    15
    
    Module Footprint - Top View
    15
  - Module Connector
    16
    
    Pin Numbering for the Module Connector
    16
    
    Module Connector Types
    16
  - User I/O
    17
  - Pinout
    17
  - I/O Pin Exceptions
    18
    
    User I/Os
    18
  - Differential I/Os
    19
  - I/O Banks
    19
  - VCC_IO Usage
    21
  - Signal Terminations
    22
  - HPS I/O Pins
    22
  - Multi-Gigabit Transceiver (MGT)
    23
    
    HPS Pin Connections
    23
  - Power
    24
  - Power Generation Overview
    24
    
    Generated Power Supplies
    24
  - Power Enable/Power Good
    25
  - Voltage Supply Inputs
    25
    
    Module Power Status and Control Pins
    25
  - Voltage Supply Outputs
    26
  - Power Consumption
    26
  - Heat Dissipation
    26
    
    Heat Sink Type
    26
  - Voltage Monitoring
    27
  - Clock Generation
    27
    
    Voltage Monitoring Outputs
    27
    
    Module Clock Resources
    27
  - Reset
    28
  - Leds
    28
  - Ddr3L Sdram
    28
    
    Reset Resources
    28
    
    DDR3L SDRAM Type
    29
    
    Signal Description
    29
    
    Termination
    29
  - Parameters
    29
    
    DDR3L SDRAM Types
    29
  - QSPI Flash
    30
    
    DDR3L SDRAM Parameters
    30
    
    DDR3L Board Timing
    30
  - QSPI Flash Type
    31
  - Signal Description
    31
  - QSPI Flash Corruption Risk
    31
  - SD Card
    31
  - Signal Description
    32
  - Emmc Flash
    32
  - Emmc Flash Type
    32
    
    SD Card Signals
    32
  - Gigabit Ethernet
    33
  - Ethernet PHY Type
    33
  - Signal Description
    33
  - External Connectivity
    33
  - MDIO Address
    33
  - PHY Configuration
    33
    
    Gigabit Ethernet PHY Type
    33
  - Dual Fast Ethernet
    34
  - Ethernet PHY Type
    34
  - Signal Description
    34
    
    Gigabit Ethernet PHY Configuration
    34
    
    Fast Ethernet PHY Type
    34
  - External Connectivity
    35
  - MDIO Address
    35
  - PHY Configuration
    35
  - Cypress FX3 USB 3.0 Controller
    35
  - Cypress FX3 Type
    35
    
    Fast Ethernet PHY Configuration
    35
  - Cypress FX3 Pinout
    36
  - Functional Description
    36
  - Usb 2.0
    36
    
    FX3 SPI Flash Boot Bypass
    36
    
    USB 3.0 Controller Type
    36
  - USB PHY Type
    37
  - Signal Description
    37
  - Real-Time Clock (RTC)
    37
  - RTC Type
    37
  - Secure EEPROM
    37
  - EEPROM Type
    37
    
    USB 2.0 PHY Type
    37
- 3 Device Configuration
  
  39
  - Configuration Signals
    39
  - FPGA and HPS Configuration Pins
    39
  - Module Connector C Detection
    40
  - Boot Mode
    40
  - Jtag
    41
  - Boot Modes
    41
  - JTAG on Module Connector
    42
  - HPS JTAG Connector
    42
  - JTAG Interface
    42
  - External Connectivity
    43
    
    HPS JTAG Connector
    43
  - Passive Serial Configuration
    44
  - Emmc Boot Mode
    44
  - QSPI Boot Mode
    44
  - SD Card Boot Mode
    44
  - Emmc Flash Programming
    44
  - QSPI Flash Programming Via JTAG
    44
  - QSPI Flash Programming from an External SPI Master
    44
  - Enclustra Module Configuration Tool
    45
    
    QSPI Flash Programming from an External SPI Master - Signal Diagrams
    45
- 4 I2C Communication
  
  46
  - Overview
    46
  - Signal Description
    46
  - I2C Address Map
    46
  - I2C Signal Description
    46
  - Secure EEPROM
    47
  - Memory Map
    47
    
    I2C Addresses
    47
    
    EEPROM Sector 0 Memory Map
    47
    
    Product Information
    48
    
    Module Configuration
    48
    
    Soc Device Types
    48
- 5 Operating Conditions
  
  49
  - Absolute Maximum Ratings
    49
  - Recommended Operating Conditions
    49
- 6 Ordering and Support
  
  50
  - Ordering
    50
  - Support
    50
List of Figures

51

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