Enclustra MA-ZX3-20-1C-D9 Manuals

Manuals and User Guides for Enclustra MA-ZX3-20-1C-D9. We have 1 Enclustra MA-ZX3-20-1C-D9 manual available for free PDF download: User Manual

Enclustra MA-ZX3-20-1C-D9 User Manual

Enclustra MA-ZX3-20-1C-D9 User Manual (48 pages)

SoC Module

Brand: Enclustra | Category: Control Unit | Size: 1 MB

Table of Contents

Table of Contents

3
- 1 Overview
  
  5
  - General
    5
  - Introduction
    5
  - Warranty
    5
  - Rohs
    5
  - Disposal and WEEE
    5
  - Safety Recommendations and Warnings
    5
  - Electrostatic Discharge
    6
  - Electromagnetic Compatibility
    6
  - Features
    6
  - Deliverables
    6
  - Accessories
    7
  - Reference Design
    7
  - Enclustra Build Environment
    7
  - Mars PM3 Base Board
    7
  - Mars EB1 Base Board
    7
  - Xilinx Tool Support
    8
- 2 Module Description
  
  9
  - Block Diagram
    9
  - Module Configuration and Product Codes
    9
    
    Hardware Block Diagram
    9
  - Article Numbers and Article Codes
    10
    
    Product Code Fields
    10
    
    Module Label
    10
    
    Standard Module Configurations
    10
    
    Article Numbers and Article Codes
    11
  - Top and Bottom Views
    12
  - Top View
    12
  - Bottom View
    12
    
    Module Top View
    12
    
    Module Bottom View
    12
  - Top and Bottom Assembly Drawings
    13
  - Top Assembly Drawing
    13
  - Bottom Assembly Drawing
    13
  - Module Footprint
    13
    
    Module Top Assembly Drawing
    13
    
    Module Bottom Assembly Drawing
    13
  - Mechanical Data
    14
  - Module Connector
    14
    
    Module Footprint - Top View
    14
  - User I/O
    15
  - Pinout
    15
    
    Module Connector Types
    15
    
    User I/Os
    15
  - Differential I/Os
    16
  - I/O Banks
    16
  - VREF Usage
    17
  - VCC_IO Usage
    17
  - Signal Terminations
    18
  - Multiplexed I/O (MIO) Pins
    19
    
    Special MIO Pins
    19
    
    MIO Pins Connections Overview
    19
  - Analog Inputs
    20
  - Power
    20
  - Power Generation Overview
    20
    
    ADC Parameters
    20
  - Power Enable/Power Good
    21
  - Voltage Supply Inputs
    21
    
    Generated Power Supplies
    21
    
    Module Power Status and Control Pins
    21
  - Voltage Supply Outputs
    22
  - Power Consumption
    22
  - Heat Dissipation
    23
  - Clock Generation
    23
    
    Power Consumption - Reference Values
    23
    
    Module Clock Resources
    23
  - Reset
    24
  - Leds
    24
  - Ddr3 Sdram
    24
    
    Reset Resources
    24
    
    DDR3 SDRAM Type
    25
    
    Signal Description
    25
    
    Termination
    25
  - Parameters
    25
    
    DDR3 SDRAM Types
    25
  - DDR3 Low Voltage Operation
    26
  - QSPI Flash
    26
    
    DDR3 SDRAM Parameters
    26
    
    DDR3 Board Timing
    26
  - QSPI Flash Type
    27
  - Signal Description
    27
  - Configuration
    27
    
    QSPI Flash Types
    27
  - NAND Flash
    28
  - NAND Flash Type
    28
  - Signal Description
    28
  - Parameters
    28
  - SD Card
    29
  - Gigabit Ethernet
    29
  - Ethernet PHY Type
    29
    
    NAND Flash Parameters
    29
    
    Gigabit Ethernet PHY Type
    29
  - Signal Description
    30
  - External Connectivity
    30
  - MDIO Address
    30
    
    Gigabit Ethernet Signal Description
    30
  - PHY Configuration
    31
  - Usb 2.0
    31
  - USB PHY Type
    31
  - Signal Description
    31
  - Real-Time Clock (RTC)
    31
    
    Gigabit Ethernet PHY Configuration
    31
    
    USB 2.0 PHY Type
    31
  - RTC Type
    32
  - Secure EEPROM
    32
  - EEPROM Type
    32
  - Revision Detection
    32
    
    Pin Location of the Revision Detection Resistor
    32
- 3 Device Configuration
  
  33
  - Configuration Signals
    33
    
    Soc Configuration Pins
    33
  - Pull-Up During Configuration
    34
  - Boot Mode
    34
    
    Pull-Up During Configuration (PUDC)
    34
    
    Boot Modes
    34
  - JTAG Boot Mode
    35
  - NAND Flash Boot Mode
    35
  - Jtag
    35
    
    Boot Mode Resistor - Assembly Drawing Top View
    35
    
    Hardware Changes for JTAG and NAND Boot Modes
    35
  - JTAG on Module Connector
    36
  - External Connectivity
    36
  - QSPI Boot Mode
    36
  - SD Card Boot Mode
    36
  - QSPI Flash Programming Via JTAG
    36
  - JTAG Interface
    36
  - QSPI Flash Programming from an External SPI Master
    37
  - NAND Flash Programming
    37
    
    QSPI Flash Programming from an External SPI Master - Signal Diagrams
    37
  - FPGA and QSPI Flash Programming Using Xilinx Impact
    38
  - Enclustra Module Configuration Tool
    38
- 4 I2C Communication
  
  39
  - Overview
    39
  - Signal Description
    39
  - I2C Signal Description
    39
  - I2C Address Map
    40
  - Secure EEPROM
    40
  - Memory Map
    40
  - I2C Addresses
    40
  - EEPROM Sector 0 Memory Map
    40
    
    Product Information
    41
    
    Module Configuration
    41
    
    Soc Device Types
    41
- 5 Operating Conditions
  
  43
  - Absolute Maximum Ratings
    43
  - Recommended Operating Conditions
    44
- 6 Ordering and Support
  
  45
  - Ordering
    45
  - Support
    45
List of Figures

46

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