Enclustra MA-ZX2-10-2I-D9-R2 FPGA Board Manuals

Manuals and User Guides for Enclustra MA-ZX2-10-2I-D9-R2 FPGA Board. We have 1 Enclustra MA-ZX2-10-2I-D9-R2 FPGA Board manual available for free PDF download: User Manual

Enclustra MA-ZX2-10-2I-D9-R2 User Manual

Enclustra MA-ZX2-10-2I-D9-R2 User Manual (44 pages)

SoC Module

Brand: Enclustra | Category: Control Unit | Size: 1 MB

Table of Contents

Table of Contents

3
- 1 Overview
  
  5
  - General
    5
  - Introduction
    5
  - Warranty
    5
  - Rohs
    5
  - Disposal and WEEE
    5
  - Safety Recommendations and Warnings
    5
  - Electrostatic Discharge
    6
  - Electromagnetic Compatibility
    6
  - Features
    6
  - Deliverables
    6
  - Accessories
    7
  - Reference Design
    7
  - Enclustra Build Environment
    7
  - Mars PM3 Base Board
    7
  - Mars EB1 Base Board
    7
  - Mars ST3 Base Board
    8
  - Xilinx Tool Support
    8
- 2 Module Description
  
  9
  - Block Diagram
    9
  - Module Configuration and Product Codes
    9
    
    Hardware Block Diagram
    9
  - Article Numbers and Article Codes
    10
    
    Product Code Fields
    10
    
    Module Label
    10
    
    Standard Module Configurations
    10
    
    Article Numbers and Article Codes
    11
  - Top and Bottom Views
    12
  - Top View
    12
  - Bottom View
    12
    
    Module Top View
    12
    
    Module Bottom View
    12
  - Top and Bottom Assembly Drawings
    13
  - Top Assembly Drawing
    13
  - Bottom Assembly Drawing
    13
    
    Module Top Assembly Drawing
    13
    
    Module Bottom Assembly Drawing
    13
  - Module Footprint
    14
  - Mechanical Data
    14
    
    Module Footprint - Top View
    14
  - Module Connector
    15
  - User I/O
    15
  - Pinout
    15
    
    Module Connector Types
    15
  - Differential I/Os
    16
  - I/O Banks
    16
    
    User I/Os
    16
  - VREF Usage
    17
  - VCC_IO Usage
    17
  - Signal Terminations
    19
  - Multiplexed I/O (MIO) Pins
    19
    
    MIO Pins Connections Overview
    19
  - Analog Inputs
    20
  - Power
    20
  - Power Generation Overview
    20
    
    ADC Parameters
    20
  - Power Enable/Power Good
    21
    
    Generated Power Supplies
    21
    
    Module Power Status and Control Pins
    21
  - Voltage Supply Inputs
    22
  - Voltage Supply Outputs
    22
  - Power Consumption
    23
  - Heat Dissipation
    23
  - Voltage Monitoring
    23
    
    Heat Sink Type
    23
  - Clock Generation
    24
  - Reset
    24
  - Leds
    24
    
    Voltage Monitoring Outputs
    24
    
    Module Clock Resources
    24
    
    Reset Resources
    24
    
    Ddr3L Sdram
    25
    
    DDR3L SDRAM Type
    25
    
    DDR3L SDRAM Types
    25
  - Signal Description
    26
  - Termination
    26
  - Parameters
    26
  - QSPI Flash
    27
  - QSPI Flash Type
    27
    
    DDR3L SDRAM Parameters
    27
    
    DDR3L Board Timing
    27
  - Signal Description
    28
  - Configuration
    28
  - QSPI Flash Corruption Risk
    28
    
    QSPI Flash Type
    28
  - SD Card
    29
  - Gigabit Ethernet
    29
  - Ethernet PHY Type
    29
  - Signal Description
    29
    
    Gigabit Ethernet PHY Type
    29
  - External Connectivity
    30
  - MDIO Address
    30
  - PHY Configuration
    30
    
    Gigabit Ethernet Signal Description
    30
  - Usb 2.0
    31
  - USB PHY Type
    31
  - Signal Description
    31
  - Real-Time Clock (RTC)
    31
  - RTC Type
    31
    
    Gigabit Ethernet PHY Configuration
    31
    
    USB 2.0 PHY Type
    31
  - Secure EEPROM
    32
  - EEPROM Type
    32
- 3 Device Configuration
  
  33
  - Configuration Signals
    33
    
    Soc Configuration Pins
    33
    
    Boot Mode Selection
    33
  - Pull-Up During Configuration
    34
  - Boot Mode
    34
    
    Pull-Up During Configuration (PUDC)
    34
  - Jtag
    35
  - JTAG on Module Connector
    35
  - External Connectivity
    35
  - QSPI Boot Mode
    35
  - SD Card Boot Mode
    35
    
    JTAG Interface
    35
  - QSPI Flash Programming Via JTAG
    36
  - QSPI Flash Programming from an External SPI Master
    36
  - FPGA and QSPI Flash Programming Using Xilinx Impact
    36
  - Enclustra Module Configuration Tool
    36
    
    QSPI Flash Programming from an External SPI Master - Signal Diagrams
    36
- 4 I2C Communication
  
  37
  - Overview
    37
  - Signal Description
    37
  - I2C Address Map
    37
    
    I2C Signal Description
    37
  - Secure EEPROM
    38
  - Memory Map
    38
    
    I2C Addresses
    38
    
    EEPROM Sector 0 Memory Map
    38
    
    Product Information
    39
    
    Module Configuration
    39
    
    Soc Device Types
    39
- 5 Operating Conditions
  
  40
  - Absolute Maximum Ratings
    40
  - Recommended Operating Conditions
    41
- 6 Ordering and Support
  
  42
  - Ordering
    42
  - Support
    42
List of Figures

43

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