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Dialog Semiconductor DA14682-00 Manuals
Manuals and User Guides for Dialog Semiconductor DA14682-00. We have
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Dialog Semiconductor DA14682-00 manual available for free PDF download: Application Note
Dialog Semiconductor DA14682-00 Application Note (45 pages)
Application hardware design guidelines
Brand:
Dialog Semiconductor
| Category:
Motherboard
| Size: 2 MB
Table of Contents
Abstract
1
Table of Contents
2
Contents
2
Figures
3
Tables
3
Terms and Definitions
4
References
4
Introduction
5
Table 1: DA14680/14682 and DA14681/14683 Chip Options
5
Device Revision Numbering and Marking
6
Table 2 CHIP_REVISION_REG (0X50003204)
6
Table 3 CHIP_TEST1_REG (Minor Revision)
6
Table 4 Chip Revision Numbering
6
Minimal Design for the Da1468X Soc
7
Figure 1: Block Diagram of the Da1468X Minimal Design
7
Figure 2: Minimal Design for DA14681-01 WLCSP53 Package
8
Figure 3: Minimal Design for DA14681-01 AQFN60 Package
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Figure 4: Minimal Design for DA14683-00 WLCSP53 Package
10
Figure 5: Minimal Design for DA14683-00 AQFN60 Package
11
Figure 6: the Power Section of the Da1468X
12
Power Section of Da1468X
12
Table 5: Suggested Decoupling Capacitors for the Power Section
13
Table 6: SIMO DC/DC Inductor Examples and Characteristics
13
Figure 7: 4.7Μf- 6.3V Capacitance Change for 0402 (Purple) and 0603 (Blue)
14
Supplying External Loads
14
Figure 8: Da1468X Power Management Unit Block Diagram
15
Table 7: Da1468X Supply Rail Capabilities Overview
15
Figure 10: Discharging Rails FSM Timing
16
Figure 9: V14, V18, V18P Rails Discharging by HW Reset
16
Supply Rails Discharging
16
Figure 11: SIMO BUCK DC/DC Block Diagram
17
SIMO Buck DC/DC Characteristics
17
Figure 12: PAD I/O Configuration
19
I/O Pins
19
Crystals and Clocks
20
16 Mhz and 32 Mhz Clock
20
Figure 13: 16 Mhz or 32 Mhz Crystal Oscillator, Recommended Operating Conditions
21
Figure 14: Connection of the Crystal (Left) and External 16 Mhz Clock (Right) for AQFN Package
21
32.768 Khz Clock
22
Table 8: 16 Mhz Crystal Examples and Characteristics
22
Table 9: 32 Mhz Crystal Examples and Characteristics
22
Figure 15: 32.768 Khz Crystal Oscillator, Recommended Operating Conditions
23
Table 10: 32.768 Khz Crystal Examples and Characteristics
23
Generating a Clock Output from the Da1468X
24
Figure 16: Clock Output, P10_MODE_REG - PUPD and PID Selection
25
Figure 17: Clock Output, GPIO_CLK_SEL - FUNC_CLK_SEL, Clock Selection
25
Swd (Jtag)
25
Table 11: Default UART Pins
25
Table 12: JTAG Pins
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Uart
25
QSPI Flash Memory
26
USB and VBUS
27
USB ESD Measures
27
Figure 18: Recommended Topology for USB Functionality
27
VBUS Circuitry
28
Figure 19: Relation between Damping and Step-Response of a Series LC Resonator
28
Figure 20: Used USB Circuit for Testing
28
Figure 21: Step Response with 60 CM (Left) and 150 CM (Right) Cable (Non USB-Cable). a Damping Network of 0.39 Ω and 10 Μf Capacitor on VBUS Is Used
29
Figure 22: Step Response with 300 CM Cable (Non USB-Cable) and the same Damping Network as above (0.39 Ω and 10 Μf Capacitor on VBUS)
29
Figure 23: Step Response of VBUS with 0.39 Ω and 10 Μf for a 1.5 M USB Cable
30
Hibernation Mode and Wakeup
30
Figure 24: Wakeup from Hibernation by VBUS Voltage Using GPIO Trigger
31
Figure 25: GPIO Set as Input (no Pull)
31
5.10 PCB Layout
32
Figure 26: RF Matching Circuit Must be Placed as Close as Possible to the Antenna
32
Figure 27: WLCSP53 PCB Stackup
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PCB Layout for WLCSP53 Package
33
Figure 28: WLCSP53 PCB Layout, Top Side
34
Figure 29: WLCSP53 PCB Layout, Layer 2
35
Figure 30: WLCSP53 PCB Layout, Layer 3, Reference GND
35
Figure 31: Ground Connectivity Top (Left) and Layer 2 (Right)
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Figure 32: AQFN60 PCB Stackup
37
PCB Layout for AQFN60 Package
37
Figure 33: AQFN60 PCB Layout, Top Layer
38
RFIO Port
32
5.11 AQFN60 - Package Outline (POD) Information
39
5.12 WLCSP53 - Package Outline (POD) Information
39
Figure 34: AQFN60 PCB Layout, Layer2, Reference Ground
39
Appendix: AQFN60 Assembly and Soldering Guidelines
40
Pcb
40
Figure 35: PCB Footprint Data
40
Stencil Design
41
Component Placement
42
Figure 36: Recommend of Stencil Opening of Thermal
42
Reflow Profile
43
Figure 37: Reflow Profile for Solder Paste SAC305
43
Revision History
44
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