Cmsemicon CMS80F731 Series Manuals

Manuals and User Guides for Cmsemicon CMS80F731 Series. We have 1 Cmsemicon CMS80F731 Series manual available for free PDF download: Reference Manual

Cmsemicon CMS80F731 Series Reference Manual (239 pages)

Enhanced flash 8-bit 1T 8051 microcontroller

Brand: Cmsemicon | Category: Microcontrollers | Size: 4 MB

Table of Content Cms80F731X Series
1
Table of Contents
2
Table of Content
2
Central Processing Unit (CPU)
11
Reset Vector (0000H)
11
BOOT Partition
11
Accumulator (ACC)
13
B Register(B)
13
Stack Pointer Register (SP)
13
Data Pointer Register (DPTR0/DPTR1)
13
Data Pointer Selection Register (DPS)
14
Program Status Register (PSW)
14
Program Counter (PC)
15
Timing Access Register (TA)
15
Memory and Register Mapping
16
Program Storage Flash
16
Non-Volatile Data Memory Data FLASH
17
General Purpose Data Memory RAM
17
General External Data Register XRAM
19
Special Function Register SFR
20
External Special Function Register XSFR
21
Reset
28
Power-On Reset
28
External Reset
30
LVR Low-Voltage Reset
30
Watchdog Reset
31
Software Reset
31
CONFIG Status Protection Reset
32
Power-On Configuration Monitor Reset
32
Clock Structure
33
System Clock Structure
33
Related Registers
34
Oscillator Control Register CLKDIV
34
System Clock Switching Register SCKSEL
34
System Clock Status Register SCKSTAU
35
System Clock Monitor Register SCM
36
Function Clock Control Registers
37
System Clock Switching
38
System Clock Monitoring
39
Power Management
40
Power Management Register PCON
40
Power Supply Monitor Register LVDCON
41
IDLE Idle Mode
41
STOP Sleep Mode
42
Sleep Wakes up
42
Wake-Up Wait State
42
Sleep Wake-Up Time
42
Reset Operation under Sleep
43
Sleep Power Consumption in Debug Mode
43
Example of a Sleep Mode Application
43
Interrupt
44
Interrupt Overview
44
External Interrupts
45
INT0/INT1 Interrupt
45
GPIO Interrupt
45
Interrupt with Sleep Wake-Up
45
Interrupt Register
46
Interrupt Mask Registers
46
Interrupt Mask Register IE
46
Interrupt Mask Register EIE2
47
Timer2 Interrupt Mask Register T2IE
47
P0 Interrupt Control Register P0EXTIE
48
Port P1 Interrupt Control Register P1EXTIE
48
P2 Interrupt Control Register P2EXTIE
48
P5 Interrupt Control Register P5EXTIE
49
Interrupt Priority Controls the Register
50
Interrupt Priority Control Register IP
50
Interrupt Priority Control Register EIP1
50
Interrupt Priority Control Register EIP2
51
Interrupt Priority Control Register EIP3
52
Interrupt Flag Bit Register
53
Timer0/1, INT0/1 Interrupt Flag Bit Register TCON
53
Timer2 Interrupt Flag Bit Register T2IF
53
Peripheral Interrupt Flag Bit Register EIF2
54
SPI Interrupt Flag Bit Register SPSR
55
I2C Master Mode Interrupt Flag Registers I2CMCR/I2CMSR
55
I2C Slave Mode Status Register I2CSSR
56
UART Control Register Sconn
56
P0 Port Interrupt Flag Register P0EXTIF
57
Port P1 Interrupt Flag Register P1EXTIF
57
P2 Port Interrupt Flag Bit Register P2EXTIF
57
P5 Port Interrupt Flag Bit Register P5EXTIF
57
The Clear Operation for the Interrupt Flag Bit
58
Special Interrupt Flag Bits in Debug Mode
59
I/O Port
60
GPIO Function
60
Portx Data Register Px
60
Portx Direction Register Pxtris
60
Portx Open-Drain Control Register Pxod
61
Portx Pull-Up Resistor Control Register Pxup
61
Portx Pull-Down Resistor Control Register Pxrd
61
Portx Slope Control Register Pxsr
62
The Portx Data Input Selects Register Pxds
62
Multiplexed Functions
63
Port Multiplexing Feature Table
63
Port Multiplexing Feature Configuration Register
65
The Port Input Function Allocation Registers
65
Communication Input Function Allocation Registers
67
Port External Interrupt Control Registers
68
Multiplexing Features Application Notes
68
Watchdog Timer (WDT)
70
Overview
70
Related Registers
70
Watchdog Control Register WDCON
70
Watchdog Overflow Control Register CKCON
71
WDT Interrupt
72
Interrupt Mask Register EIE2
72
Interrupt Priority Control Register EIP2
73
Timer Counter 0/1 (Timer0/1)
74
Overview
74
Related Registers
75
Timer0/1 Mode Register TMOD
75
Timer0/1 Control Register TCON
76
Timer0 Data Register Low Bit TL0
77
Timer0 Data Register High Bit TH0
77
Timer1 Data Register Low Bit TL1
77
Timer1 Data Register High TH1
77
Function Clock Control Register CKCON
78
Timer0/1 Interrupt
79
Interrupt Mask Register IE
79
Interrupt Priority Control Register IP
80
Timer0/1, INT0/1 Interrupt Flag Bit Register TCON
81
Timer0 Working Mode
82
T0 - Mode 0 (13-Bit Timing/Counting Mode)
82
T0 - Mode 1 (16-Bit Timing/Counting Mode)
82
T0 - Mode 2 (8-Bit Auto-Reload Timing/Counting Mode)
83
T0 - Mode 3 (Two Separate 8-Bit Timers/Counters)
83
Timer1 Working Mode
84
T1 - Mode 0 (13-Bit Timing/Counting Mode)
84
T1 - Mode 1 (16-Bit Timing/Counting Mode)
84
T1 - Mode 2 (8-Bit Auto Reload Timing/Counting Mode)
85
T1 - Mode 3 (Stop Count)
85
Timer Counter 2 (Timer2)
86
Overview
86
Related Registers
87
Timer2 Control Register T2CON
87
Timer2 Data Register Low Bit TL2
87
Timer2 Data Register High TH2
88
Timer2 Compare/Capture/Auto Reload Register Low Bit RLDL
88
Timer2 Compare/Capture/Auto Reload Register High Bit RLDH
88
Timer2 Compares/Captures Channel 1 Register Low Bit CCL1
88
Timer2 Compares/Captures Channel 1 Register High Bit CCH1
88
Timer2 Compares/Captures Channel 2 Register Low-Bit CCL2
89
Timer2 Compares/Captures Channel 2 Register High-Bit CCH2
89
Timer2 Compares/Captures Channel 3 Register Low-Bit CCL3
89
Timer2 Compares/Captures Channel 3 Register High-Bit CCH3
89
Timer2 Compares the Capture Control Register CCEN
90
Timer2 Interrupts
91
Interrupt Correlation Registers
91
Interrupt Mask Register IE
91
Timer2 Interrupt Mask Register T2IE
92
Interrupt Priority Control Register IP
92
Timer2 Interrupt Flag Bit Register T2IF
93
Timer Interrupts
94
Externally Triggered Interrupts
94
Compare Interrupts
94
Capture Interrupts
94
Timer2 Feature Description
95
Timing Mode
95
Reload Mode
95
Gated Timing Mode
96
Event Counting Mode
96
Compare Mode
97
Compare Mode 0
97
Comparison Mode 1
98
Capture Mode
99
Capture Mode 0
99
Capture Mode 1
100
Timer 3/4 (Timer3/4)
101
Overview
101
Related Registers
101
Timer3/4 Control Register T34MOD
101
Timer3 Data Register Low Bit TL3
102
Timer3 Data Register High Bit TH3
102
Timer4 Data Register Low Bit TL4
102
Timer4 Data Register High Bit TH4
102
Timer3/4 Interrupt
103
Interrupt Mask Register EIE2
103
Interrupt Priority Control Register EIP2
104
Peripheral Interrupt Flag Bit Register EIF2
105
Timer3 Working Mode
106
T3 - Mode 0 (13-Bit Timing Mode)
106
T3 - Mode 1 (16-Bit Timing Mode)
106
T3 - Mode 2 (8-Bit Auto Reload Timing Mode)
107
T3 - Mode 3 (Two Separate 8-Bit Timers)
107
Timer4 Working Mode
108
T4 - Mode 0 (13-Bit Timing Mode)
108
T4 - Mode 1 (16-Bit Timing Mode)
108
T4- Mode 2 (8-Bit Auto Reload Timing Mode)
109
T4 - Mode 3 (Stop Count)
109
LSE Timer(Lse_Timer)
110
Overview
110
Related Registers
110
LSE Timer Data Register Low 8 Bit LSECRL
110
LSE Timer Data Registers Are 8 Bits High LSECRH
110
LSE Timer Control Register LSECON
111
Interrupt with Sleep Wake-Up
112
Feature Description
113
Wake-Up Timer (WUT)
114
Overview
114
Related Registers
114
WUTCRH Register
114
WUTCRL Register
114
Feature Description
115
Baud Rate Timer (BRT)
116
Overview
116
Related Registers
116
BRT Module Control Register Brtcon
116
The BRT Timer Data Is Loaded with a Low 8-Bit Register BRTDL
116
The BRT Timer Data Is Loaded with a High 8-Bit Register BRTDH
116
Feature Description
117
Cyclic Redundancy Check Unit (CRC)
118
Overview
118
Related Registers
118
CRC Data Input Register CRCHIN
118
The CRC Operation Results in a Low 8-Bit Data Register, CRCDL
118
The CRC Operation Results in a High 8-Bit Data Register with CRCDH
118
Feature Description
119
Buzzer Driver (BUZZER)
120
Overview
120
Related Registers
120
BUZZER Control Register BUZCON
120
BUZZER Frequency Control Register BUZDIV
120
Feature Description
121
PWM Module
122
Overview
122
Characteristic
122
Port Configuration
122
Feature Description
123
Functional Block Diagram
123
Edge Alignment
124
Complementary Model
125
Synchronous Mode
126
PWM-Related Registers
127
PWM Control Register PWMCON
127
PWM Output Enable Control Register PWMOE
127
PWM0/1 Clock Prescale Control Register PWM01PSC
128
PWM2/3 Clock Prescale Control Register PWM23PSC
128
PWM4/5 Clock Prescale Control Register PWM45PSC
128
PWM Clock Divide Control Register Pwmndiv (N=0-5)
129
PWM Data Loading Enable Control Register PWMLOADEN
129
PWM Output Polarity Control Register PWMPINV
129
PWM Counter Mode Control Register PWMCNTM
130
PWM Counter Enable Control Register PWMCNTE
130
PWM Counter Mode Control Register PWMCNTCLR
130
PWM Cycle Data Register Low 8 Bits Pwmpnl (N=0-5)
130
PWM Cycle Data Register High 8 Bits Pwmpnh (N=0-5)
131
PWM Compare Data Register Low 8 Bits Pwmdnl (N=0-5)
131
PWM Compare Data Register High 8 Bits Pwmdnh (N=0-5)
131
PWM Dead-Zone Enable Control Register PWMDTE
131
PWM0/1 Dead-Zone Delay Data Register PWM01DT
132
PWM2/3 Dead-Zone Delay Data Register PWM23DT
132
PWM4/5 Dead-Zone Delay Data Register PWM45DT
132
PWM Interrupt
133
Interrupt Mask Register EIE2
133
Interrupt Priority Control Register EIP2
134
PWM Zero Interrupt Mask Register PWMZIE
134
PWM down Compare Interrupt Mask Register PWMDIE
135
PWM Zero Interrupt Flag Register PWMZIF
135
PWM down Compare Interrupt Flag Register PWMDIF
135
Hardware LED Matrix Driver
136
Overview
136
Characteristic
136
Related Registers
136
LED Drive Mode Select Register LEDMODE
136
LED Control Register LEDCON
137
LED Clock Prescale Data Register Low 8 Bit LEDCLKL
137
LED Clock Prescale Data Register High 8 Bit LEDCLKH
138
COM Port Valid Time Selection Register LEDCOMTIME
138
COM Port Enable Control Register LEDCOMEN
138
SEG Port Enable Control Register LEDSEGEN0
138
SEG Port Enable Control Register LEDSEGEN1
139
COM0 Corresponding SEG Data Register Ledc0Datan (N=0-1)
139
COM1 Corresponding SEG Data Register Ledc1Datan (N=0-1)
139
COM2 Corresponding SEG Data Register Ledc2Datan (N=0-1)
139
COM3 Corresponding SEG Data Register Ledc3Datan (N=0-1)
140
COM4 Corresponding SEG Data Register Ledc4Datan (N=0-1)
140
COM5 Corresponding SEG Data Register Ledc5Datan (N=0-1)
140
COM6 Corresponding SEG Data Register Ledc6Datan (N=0-1)
140
COM7 Corresponding SEG Data Register Ledc7Datan (N=0-1)
141
P04-P07 Drive Current Control Register LEDSDRP0H
141
P10-P13 Drive Current Control Register LEDSDRP1L
141
P14-P17 Drive Current Control Register LEDSDRP1H
142
P20-P23 Drive Current Control Register LEDSDRP2L
142
LED Pin Drive Enable Low 8-Bit LEDENL
143
LED Pin Drive Enable High 8-Bit LEDENH
145
COM Port Sink Current Selection Register P0DR
147
LED Driver Output Waveform
148
Hardware LED Dot Matrix Driver
149
Overview
149
Characteristic
149
Feature Description
150
Related Registers
155
LED Drive Mode Select Register LEDMODE
155
LED Dot Matrix Drive Controller LEDCON1
155
LED Dot Matrix Drive Clock Prescale Register Low 8 Bit LEDCLKL1
156
LED Dot Matrix Drive Clock Prescale Register High 8 Bits LEDCLKH1
156
LED Dot Matrix Drive First Stage Configuration Register Higher 8 Bits Scan1Wh
156
LED Dot Matrix Drive First Stage Configuration Register Low 8 Bits SCAN1WL
156
LED Dot Matrix Drives Second Stage Configuration Register High 8 Bits Scan2Wh
157
LED Dot Matrix Drive Second Stage Configuration Register Low 8 Bits SCAN2WL
157
LED Dot Matrix Drive Display Data Register Ledndata (N=0-7)
157
LED Dot Matrix Drive Cycle Select Register Lednsel (N=0-7)
158
P00-P03 Drive Current Control Register LEDSDRP0L
158
P04-P07 Drive Current Control Register LEDSDRP0H
159
LED Pin Drive Enable Low 8-Bit LEDENL
159
LED Pin Drive Enable High 8-Bit LEDENH
161
LED Dot Matrix Drive Interrupt
163
LED Dot Matrix Drive Status Register LEDSTATUS
163
Interrupt Priority Control Register EIP2
163
SPI Module
164
Overview
164
SPI Port Configuration
165
SPI Hardware Description
166
SPI-Related Registers
168
SPI Control Register SPCR
168
SPI Data Register SPDR
168
SPI Device Select Control Register SSCR
169
SPI Status Register SPSR
169
SPI Master Mode
170
Write Conflict Error
171
SPI Slave Mode
172
Address Error
172
Write Conflict Error
172
SPI Clock Control Logic
174
SPI Clock Phase and Polarity Control
174
SPI Transfer Format
174
CPHA=0 Transfer Format
174
CPHA=1 Transfer Format
175
SPI Data Transfer
176
SPI Transfer Starts
176
SPI Transfer Ends
176
SPI Timing Diagram
177
Master Mode Transmission
177
Slave Mode Transmission
177
SPI Interrupt
178
Interrupt Mask Register EIE2
178
Interrupt Priority Control Register EIP2
179
Peripheral Interrupt Flag Bit Register EIF2
180
I2C Module
181
Overview
181
I2C Port Configuration
182
I2C Master Mode
182
I2C Master Mode Timing Cycle Register
182
I2C Master Mode Control and Status Registers
183
I2C Slave Address Register
186
I2C Master Mode Transmit and Receive Data Registers
186
I2C Slave Mode
187
I2C Own Address Register I2CSADR
187
I2C Slave Mode Control and Status Registers I2CSCR/I2CSSR
187
I2C Slave Mode Transmit and Receive Buffer Registers I2CSBUF
188
I2C Interrupt
189
Interrupt Mask Register EIE2
189
Interrupt Priority Control Register EIP2
190
Peripheral Interrupt Flag Bit Register EIF2
191
I2C Slave Mode Transmission Mode
192
Single Receive
192
Single Send
193
Continuous Reception
194
Continuous Sending
195
Uartn Module
196
Overview
196
Uartn Port Configuration
196
Uartn Baud Rate
197
Baud Rate Clock Source
197
Baud Rate Calculation
197
Baud Rate Error
198
Uartn Register
200
UART0/1 Baud Rate Selection Register FUNCCR
200
Uartn Buffer Register Sbufn
200
UART Control Register Sconn
201
PCON Registers
202
Uartn Interrupt
203
Interrupt Mask Register IE
203
Interrupt Priority Control Register IP
204
Uartn Mode
205
Mode 0 - Synchronous Mode
205
Mode 1-8 Bit Asynchronous Mode (Variable Baud Rate)
205
Mode 2-9 Bit Asynchronous Mode (Fixed Baud Rate)
206
Mode 3-9 Bit Asynchronous Mode (Variable Baud Rate)
206
Analog-To-Digital Converter (ADC)
207
Overview
207
ADC Configuration
208
Port Configuration
208
Channel Selection
208
ADC Reference Voltage
208
Convert the Clock
209
Result Format
209
The ADC Hardware Trigger Start
210
The External Port Edge Triggers the ADC
210
PWM Triggers the ADC
210
Hardware Trigger Start Delay
210
ADC Results Comparison
211
How the ADC Works
211
Start the Conversion
211
Complete the Conversion
211
Terminate the Conversion
211
A/D Conversion Steps
211
Go to Sleep During the Conversion Process
212
Related Registers
213
AD Control Register ADCON0
213
AD Control Register ADCON1
214
AD Control Register ADCON2
214
AD Channel Selection Register ADCCHS
215
AD Comparator Control Register ADCPC
216
AD Hardware Trigger Delay Data Register ADDLYL
216
AD Data Register High ADRESH, ADFM=0 (Left Aligned)
216
AD Data Register Low ADRESL, ADFM=0 (Left Aligned)
216
AD Data Register High ADRESH, ADFM=1 (Right-Aligned)
217
AD Data Register Low ADRSL, ADFM = 1 (Right-Aligned)
217
AD Comparator Data Register ADCCMPH
217
AD Comparator Data Register ADCOP
217
AD Reference Voltage Control Register
218
ADC Interrupt
219
Interrupt Mask Register EIE2
219
Interrupt Priority Control Register EIP2
220
Peripheral Interrupt Flag Bit Register EIF2
221
Touch Module (TOUCH)
222
Touch Module Usage Considerations
222
Flash Memory
223
Overview
223
Related Registers
224
Flash Protect Lock Register MLOCK
224
FLASH Memory Data Register MDATA
224
FLASH Memory Address Register MADRL
224
FLASH Memory Address Register MADRH
224
Program CRC Operation Result Data Register Lower 8-Bit PCRCDL
225
Program CRC Operation Result Data Register Higher 8-Bit PCRCDH
225
FLASH Memory Control Register MCTRL
225
Feature Description
226
Unique ID (UID)
228
Overview
228
UID Register Description
228
User Configuration
231
In-Circuit Programming and Debugging
233
Online Programming Mode
233
Online Debug Mode
234
Instruction Description
235
Symbol Description
235
List of Instructions
236
Version Revision Notes
239

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