Arnewsh SBC5307 Manuals

Manuals and User Guides for Arnewsh SBC5307. We have 1 Arnewsh SBC5307 manual available for free PDF download: User Manual

Arnewsh SBC5307 User Manual

Arnewsh SBC5307 User Manual (88 pages)

Brand: Arnewsh | Category: Single board computers | Size: 0 MB

Table of Contents

Table of Contents
4
General Hardware Description
8
Introduction
8
Parallel I/O Ports
10
Programmable Timer/Counter
10
Serial Communication Channels
10
System Memory
10
Installation and Setup
11
On Board Ethernet
11
System Configuration
11
Unpacking
11
Connecting the Terminal
12
Preparing the Board for Use
12
Providing Power to the Board
12
Selecting Terminal Baud Rate
12
The Terminal Character Format
12
Using a Personal Computer as a Terminal
13
Jumper JP1- Flash Upper Half/Lower Half Boot
16
Sbc5307 Jumper Setup
16
System Power-Up and Initial Operation
16
Jumper JP2 - this Jumper Selects between /CS0 to Flash or a Header
17
Using the Bdm
17
Chapter 2

18
- What Is Dbug
  18
- Operational Procedure
  19
- System Power-Up
  19
- System Initialization
  21
- Hard RESET Button
  21
- ABORT Button
  21
- Software Reset Command
  21
- USER Program
  22
- System Operation
  22
- Terminal Control Characters
  22
- Dbug Command Set
  23
- AS - Assemble
  25
- BC - Compare Blocks of Memory BC
  27
- BF - Block of Memory Fill
  28
- BM - Block Move BM
  29
- BR - Breakpoint
  30
- BS - Block Search BS
  31
- DATA - Data Conversion DATA
  32
- DI - Disassemble DI
  33
- DL - Download Serial DL
  34
- DN - Download Network
  35
- Go - Execute
  36
- GT - Execute Till a Temporary Breakpoint GT
  37
- HELP - Help HE
  38
- IRD - Internal Registers Display IRD
  39
- IRM - Internal Registers MODIFY IRM
  40
- MD - Memory Display
  41
- MM - Memory Modify MM
  42
- RD - Register Display RD
  43
- RM - Register Modify RM
  44
- RESET - Reset the Board and Dbug RESET
  45
- SET - Set Configuration SET
  46
- SHOW - Show Configuration
  48
- Show
  48
- STEP - Step over ST
  49
- SYMBOL - Symbol Name Management
  50
- Symbol
  50
- TRACE - Trace into TR
  51
- UPDBUG - Update the Dbug Image UPDBUG
  52
- UPUSER - Update User Code in Flash UPUSER
  53
- Trap #15 Functions
  55
Chapter 3

57
- The Processor and Support Logic
  57
- The Processor
  57
- The Reset Logic
  57
- The -HIZ Signal
  58
- The Clock Circuitry
  58
- Watchdog Timer (BUS MONITOR)
  58
- Interrupt Sources
  58
- Internal SRAM
  59
- The MCF5307 Registers and Memory Map
  59
- Reset Vector Mapping
  60
- TA Generation
  60
- Wait State Generator
  60
- The Sdram DIMM
  61
- Flash Rom
  61
- JP1 Jumper and User' S Program
  61
- The Serial Communication Channels
  61
- The MCF5307 DUART
  62
- Motorola Bus (M-Bus) Module
  62
- The Parallel I/O Port
  62
- On Board Ethernet Logic
  63
- The Connectors and the Expansion Bus
  65
- The Terminal Connector J4
  65
- The Auxiliary Serial Communication Connector J7
  65
- The Debug Connector J1
  71
Appendix A (Configuring Dbug for Network Downloads)

72
Appendix B (Fpla Code)

75
Appendix C (Schematics)

79
Appendix D (Pin Array Layout)

88

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