User Manuals: ADLINK Technology DAQ/PXI-2005 Card

Manuals and User Guides for ADLINK Technology DAQ/PXI-2005 Card. We have 2 ADLINK Technology DAQ/PXI-2005 Card manuals available for free PDF download: User Manual

ADLINK Technology DAQ/PXI-2005 User Manual (86 pages)

4-CH, Simultaneous, High Performance Multi-Function Data Acquisition Card

Brand: ADLINK Technology | Category: PCI Card | Size: 3 MB

Table of Contents
6
Introduction
12
Features
13
Applications
14
Specifications
15
Table 1-1: -3Db Small Signal Bandwidth
16
Table 1-2: System Noise
16
Table 1-3: CMRR: (DC to 60Hz)
18
Software Support
24
Programming Library
24
DAQ-LVIEW Pnp: Labview® Driver
24
D2K-OCX: Activex Controls
25
Installation
26
Contents of Package
26
Unpacking
26
DAQ/PXI-20XX Layout
28
Figure 2-1: PCB Layout of the DAQ-20XX
28
Figure 2-2: PCB Layout of the PXI-20XX
28
PCI Configuration
29
Signal Connections
30
Connectors Pin Assignment
30
Table 3-1: 68-Pin VHDCI-Type Pin Assignment
30
Table 3-2: 68-Pin VHDCI-Type Connector Legend
31
Table 3-3: SSI Connector (JP3) Pin Assignment for DAQ-20XX
33
Table 3-4: Legend of SSI Connector
33
Analog Input Signal Connection
35
Types of Signal Sources
35
Single-Ended Measurements
35
Differential Measurements
36
Figure 3-1: Single-Ended Connections
36
Figure 3-2: Ground-Referenced Source and Differential Input
36
Figure 3-3: Floating Source and Differential Input
37
Operation Theory
38
A/D Conversion
38
DAQ/PXI-2010 AI Data Format
39
Figure 4-1: Synchronous Digital Inputs Block Diagram
39
Figure 4-2: Synchronous Digital Inputs Timing
39
Table 4-1: Bipolar Analog Input Range and the Output Digital Code on
40
Table 4-2: Unipolar Analog Input Range and the Output Digital Code
40
DAQ/PXI-2005/2006/2016 AI Data Format
41
Software Conversion with Polling Data Transfer Acqui-Sition Mode (Software Polling)
41
Table 4-3: Bipolar Analog Input Range and the Output Digital Code on the DAQ/PXI-2005/2006/2016
41
Table 4-4: Unipolar Analog Input Range and the Output Digital Code on the DAQ/PXI-2005/2006/2016
41
Programmable Scan Acquisition Mode
42
Figure 4-3: Scan Timing
43
Trigger Modes
44
Figure 4-4: Pre-Trigger
45
Figure 4-5: Pre-Trigger Scan Acquisition (Trigger Occurs When a Con- Version Is in Progress)
45
Figure 4-6: Pre-Trigger with M_Enable
46
Figure 4-7: Pre-Trigger with M_Enable = 1
46
Figure 4-8: Middle Trigger with M_Enable = 1
47
Figure 4-10: Post Trigger
49
Figure 4-11: Delay Trigger
50
Figure 4-12: Post Trigger with Re-Trigger
51
D/A Conversion
53
Figure 4-13: Scatter/Gather DMA for Data Transfer
53
Software Update
54
Table 4-5: Bipolar Output Code Table (Vref=10V if Internal Reference Is Selected)
54
Table 4-6: Unipolar Output Code Table (Vref=10V if Internal Reference Is Selected)
54
Timed Waveform Generation
55
Trigger Modes
56
Figure 4-14: Typical D/A Timing of Waveform Generation (Assuming the Data in the Data Buffer Are 2V, 4V, -4V, 0V)
56
Figure 4-15: Post Trigger Waveform Generation (Assuming the Data in the Data Buffer Are 2V, 4V, 6V, 3V, 0V, -4V, -2V, 4V)
57
Figure 4-16: Delay Trigger Waveform Generation (Assuming the Data in the Data Buffer Are 2V, 4V, 6V, 3V, 0V, -4V, -2V, 4V)
58
Figure 4-17: Re-Triggered Waveform Generation (Assuming the Data in the Data Buffer Are 2V, 4V, 2V, 0V)
58
Figure 4-18: Finite Iterative Waveform Generation with Post-Trigger and Dly2_Counter = 0 (Assuming the Data in the Data Buffer Are 2V, 4V, 2V, 0V)
59
Figure 4-19: Infinite Iterative Waveform Generation with Post-Trigger and Dly2_Counter = 0 (Assuming the Data in the Data Buffer Are 2V, 4V, 2V, 0V)
60
Figure 4-20: Stop Mode I
61
Digital I/O
62
Figure 4-21: Stop Mode II
62
Figure 4-22: Stop Mode III
62
General Purpose Timer/Counter Operation
63
Timer/Counter Functions Basics
63
General Purpose Timer/Counter Modes
64
Figure 4-23: Mode 1 Operation
64
Figure 4-24: Mode 2 Operation
65
Figure 4-25: Mode 3 Operation
65
Figure 4-26: Mode 4 Operation
66
Figure 4-27: Mode 5 Operation
66
Figure 4-28: Mode 6 Operation
67
Figure 4-29: Mode 7 Operation
67
Trigger Sources
68
Software-Trigger
68
External Analog Trigger
68
Figure 4-30: Mode 8 Operation
68
Table 4-7: Analog Trigger SRC1 (EXTATRIG) Ideal Transfer Charac
69
Figure 4-31: Analog Trigger Block Diagram
69
Figure 4-32: Below-Low Analog Trigger Condition
70
Figure 4-33: Above-High Analog Trigger Condition
70
Figure 4-34: Inside-Region Analog Trigger Condition
71
Figure 4-35: High-Hysteresis Analog Trigger Condition
71
User-Controllable Timing Signals
72
Figure 4-36: Low-Hysteresis Analog Trigger Condition
72
Figure 4-37: External Digital Trigger
72
Figure 4-38: DAQ Signals Routing
73
DAQ Timing Signals
74
Table 4-8: Summary of User-Controllable Timing Signals and the Corresponding Functionalities
74
Auxiliary Function Inputs (AFI)
75
Table 4-9: Auxiliary Function Input Signals and the Corresponding
76
System Synchronization Interface
78
Table 4-10: Summary of SSI Timing Signals and the Corresponding Functionalities as the Master or Slave
78
Ai_Trig_Out and Ao_Trig_Out
80
Calibration
82
Loading Calibration Constants
82
Auto-Calibration
82
Saving Calibration Constants
83

ADLINK Technology DAQ/PXI-2005 User Manual (86 pages)

4-CH, Simultaneous, High Performance Multi-Function Data Acquisition Card

Brand: ADLINK Technology | Category: PCI Card | Size: 22 MB

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User Manuals: ADLINK Technology DAQ/PXI-2005 Card

ADLINK Technology DAQ/PXI-2005 User Manual (86 pages)

Table of Contents

ADLINK Technology DAQ/PXI-2005 User Manual (86 pages)

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