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XMC-ZU5EV1-42-50
Acromag XMC-ZU5EV1-42-50 Manuals
Manuals and User Guides for Acromag XMC-ZU5EV1-42-50. We have
1
Acromag XMC-ZU5EV1-42-50 manual available for free PDF download: User Manual
Acromag XMC-ZU5EV1-42-50 User Manual (82 pages)
Xilinx Zynq UltraScale+ FPGA Based XMC Modules
Brand:
Acromag
| Category:
Computer Hardware
| Size: 3 MB
Table of Contents
Table of Contents
2
1 General Information
5
Intended Audience
5
Preface
5
Trademark, Trade Name and Copyright Information
5
Class a Product Warning
5
Environmental Protection Statement
5
Product Summary
5
Software Support
6
Windows
6
Linux
6
Vxworks
7
Engineering Design Kit (EDK)
7
Related Material
7
Ordering Information
7
Key Features and Benefits
8
2 Preparation for Use
10
Unpacking and Inspecting
10
Installation Considerations
11
3 Hardware Information and Configuration
11
Module Hardware Switch Configuration
12
Boot Mode and JTAG Program Enable SW1
12
JTAG Programming Voltage and FRU Voltage Select SW2
13
P15 Primary XMC Connector
13
Rear P4 Field I/O Connector
14
P16 Secondary XMC Connector
15
DDR4 Memory
17
Quad SPI Flash
18
Microsd Card Interface
18
Emmc Flash
18
UART Interface
18
I2C Ports
19
Displayport
19
Clocks
19
P1 150 Pin AXM Connector
20
P2 50 Pin AXM Connector
20
Power
21
Leds
22
Reset
23
4 Programming Information
23
Configuration Registers
23
BAR0 Memory Map
24
BAR2 Memory Map
25
AXM Module Register Space
26
AXMZ01 Board Identification Register (Read/Write) - BAR2 + 0X0001 8000 or Zynq 0Xa001 8000
26
Firmware Revision Register (Read Only) - BAR2 + 0X0001 8008 or Zynq 0Xa001 8008
26
P16 Input Data Register (Read Only) - (BAR2 + 0X2_0000)
26
P16 Output Data Register (Write Only) - (BAR2 + 0X20008)
27
P4 Rear Input Data Register (Read Only) - (BAR2 + 0X3_0000)
28
P4 Rear Output Data Register (Write Only) - (BAR2 + 0X3_0008)
29
System Management Wizard (System Monitor)
30
Block RAM
31
5 Overview of Xilinx Vivado and Vitis Tools
31
XMC-ZU Testing Hardware Requirements
32
Vitis Integrated Design Environment and Vivado Design Suite
32
Vivado and the Programmable Logic
33
XMC-ZU Board Definition Files
33
XMC-ZU Programmable Logic Block Diagram Overview
34
XMC-ZU Programmable Logic Design Constraints
43
Compile and Export Bit Files
44
Vitis Integrated Design Environment (IDE)
45
Creating a Hardware Platform Using Vitis
46
Creating a New Application
52
Preparing the Boot Image
56
Steps to Program the Flash
59
6 XMC-ZU Processing System Bare Metal Software
60
System Monitor Example Bare Metal Demo
61
IO Examples Bare Metal Demo
62
Ethernet Test Bare Metal Demo
65
USB Mass Storage Bare Metal Demo
67
Displayport Example
70
Emmc Read/Write Test
72
IIC Bare Metal Software
73
UART1 Test
76
7 Service and Repair
77
Service and Repair Assistance
77
Preliminary Service Procedure
77
Where to Get Help
77
8 Specifications
78
Physical
78
Power
78
Pcie Bus Specifications
78
Operating Temperature
78
Relative Humidity
79
Isolation
79
Vibration and Shock Standards
79
EMC Directives
79
Reliability Prediction
80
9 Certificate of Volatility
81
10 Revision History
82
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