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Manuals
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Nintendo Manuals
Game Console
Virtual Boy
Development manual
Nintendo Virtual Boy Development Manual
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:
Instruction book
(28 pages)
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Table Of Contents
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Contents
Table of Contents
Bookmarks
Table of Contents
Table of Contents
List of Figures
List of Effective Pages
Introduction to Virtual Boy
Virtual Boy System Configuration
Scanner
Central Processing Unit
Virtual Image Processor
Video RAM
Dynamic RAM
Work RAM
Controller
Game PAK
Fundamentals of Three-Dimensional Display
Illustration of 3-D Fundamentals
VIP Supported Three-Dimensional Displays
Creating a Game with a Polygon
Introduction to Scanner
Scanner Configuration
LED Array
LED Driver
Mirror
Motor Drive and Sensor
Servo Control
Lens
Basic Operation of Scanner
Scanner Frequency of Operation
Dot Pitch Width Compensation
Brightness Control
Concept of Brightness Level Control Circuit
Scanner and VIP Interface
Introduction to Central Processor
NVC Integral Configuration
NVC Address Map
NVC Internal Hardware Control Registers
Wait Control
Internal Wait Control
Interrupt Control
Timer Control
Timer Zero Interrupt
Cautions
Description of Registers
Timer Control Register
Serial Port Control
Timer Counter High Register
Timer Counter Low Register
Key Input Interrupt
Reading the Keys Using Software
Serial Data High Register
Serial Data Low Register
Serial Data Format
Serial Control Register
Communication Port Control
Communication Interrupt
Communication Using an External Clock
Comcnt Terminal
Comcnt Input Interrupt
Received Data Register
Transmitted Data Register
Comcnt Control Register
Communication Protocol
Communication Control Register
Cautions When Using Work RAM
Custom Commands
Exchange Byte
Exchange Half Word
Clear Interrupt Disable Flag in PSW
Set Interrupt Disable Flag in PSW
Reverse Bits in Word
Multiply Half Word
Processor ID Register
NVC Programming Cautions
Introduction to Virtual Image Processor
World
World Attributes
Parameter Tables
H Bias Table
Column Table
Affine Table
VIP Internal Configuration
Host Interface
Pixel Processor
Display Processor
VRM Interface
DRAM Interface
VIP Basic Operation
Display Processing
VIP Control Registers
Interrupt Registers
Image Display Registers
Image Drawing Registers
VIP Memory Map
Character Data Storage
Character Data Storage Address Re-Mapping
Character Data Format
OBJ Attributes
Object Attribute Memory
OBJ Control
BG Maps
BG Map Arrangement
Combining Basic BG Maps
BG Map Programming Cautions
Examples of BG Segment Combinations
2 Segment Combination
4 Segment Combination
8 Segment Combination
Palette Control
BG Palette Control Register
Obj Palette Control Register
BG Color Palette Control Register
Format of World Attributes
World Attribute Write Data
Location of BG Image Display
BG X Destination
BG y Destination
BG Window Size
Window Width
Window Height
Param_Base
BG Screen Display Mode
Overplane
End World Specifier
Screen X Size
BG Map Storage Address
World Attribute Settings
Dummy World
Obj World
World Attributes in Memory
Expansion of BG
Effective Use of Bgs
Frame Buffers
Frame Buffer Configuration
Caution for Undisplayed Area
Display Control
Display Control Read Register
Display Control Write Register
Drawing Control
Drawing Control Read Register
Drawing Control Write Register
The VIP Drawing Process
Game Frame Control
Game Frame Control Register
Example of 1 Game Frame Equals 1 Display Frame
Example of 1 Game Frame Equals 2 Display Frames
Interrupt Pending
Interrupt Enable
Interrupt Clear
Interrupt Pending & Enable Flags Cleared on Reset
Brightness Control Register
Repeat Control Register
Brightness Control Clock Timing
Column Table Component
Column Table Memory Assignment
Column Table Read Start Address
VIP Version Control
H-Bias Table
H-Bias Table in Memory
Affine Table Elements
Parallax MP in the Affine Table
Synchronizing Multiple Systems
GCLK Synchronization Software Example
VIP Status after Reset
VRM Access
VIP Programming Cautions
Background Color Palette
VRM and DRAM Priority
Data Access
Introduction to Sound Processor
VSU Internal Configuration
VSU Memory Map
VSU Control Registers
Waveform RAM Data Base Address Settings
Set Waveform RAM Data Read Clock Cycle
Random Number Generation Clock Frequency
Random Number Generation Sampling Frequencies
L/R Output Level Setting
Sound Output Level
Sound Output Level Table
Sound Interval Setting
Sound Interval Table
Sound Start/Stop
Stopping All Sound Source Output
Envelope Setting
Envelope Step Time
Sweep/Modulation Function Settings
Sweep/Modulation Operation Interval
Modulation Data
Noise Sound Source
Control Registers
Tap Location
VUE Software Development Guidelines
Introduction
Mandatory Programming Requirements
Recommendations
Understanding Parallax and Its Limits
Disparity
Maximum Uncrossed Disparity
Maximum Crossed Disparity
Disparity Bounds Within the Comfort Zone
Range of Disparity Without Convergence
Additional Recommendations
Developer Product Evaluation
Game Content Guidelines
Index
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