Diagrams - Sony PCM-D1 Service Manual

Note on Schematic Diagrams:
• All capacitors are in µF unless otherwise noted. (p: pF)
50 WV or less are not indicated except for electrolytics
and tantalums.
1
• All resistors are in Ω and /
4
specified.
• f : internal tolerance.
• C : panel designation.
• A : B+ Line.
• Power voltage is dc 6.0V and fed with regulated dc power
supply from battery terminal.
• Voltages and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : PB
[ ] : REC
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal production
tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal production
tolerances.
• Circled numbers refer to waveforms.
• Signal path.
c : REC (DIGITAL)
L : REC (ANALOG)
J
: PB (DIGITAL)
F
: PB (ANALOG)
Replacement of IC6001, 8101 and 8201 used in this
*
set requires a special tool.
• The voltage and waveform of CSP (chip size package)
cannot be measured, because its lead layout is different
from that of conventional IC.
• Waveform
— MAIN Board —
IC7001 ws (X0)
1
11.095MHz
1V/DIV, 50nsec/DIV
SECTION 5

DIAGRAMS

W or less unless otherwise
3Vp-p
Note on Printed Wiring Boards:
• X : parts extracted from the component side.
•
: Pattern from the side which enables seeing.
(The other layers' patterns are not indicated.)
Caution:
Pattern face side: Parts on the pattern face side seen from the
(Side B) pattern face are indicated.
Parts face side: Parts on the parts face side seen from the
(Side A) parts face are indicated.
Replacement of IC6001, 8101 and 8201 used in this set
*
requires a special tool.
• Lead layouts
Lead layout of
conventional IC
PCM-D1
surface
CSP (chip size package)
19