Block Diagram -Audio Section (2/2) - Sony NW-MS7 Service Manual

NW-MS7
4-3. BLOCK DIAGRAM — AUDIO SECTION (2/2) —
48 49
MAGIC GATE IC
IC702
FIFO0
ATRAC
16
INTERFACE
DES
CONTROL
FIFO1
16
CPU INTERFACE
AB0-AB7 DB0-DB15
93,92,90,89,87,86,82,
108,107,105,104,
5 2 3 97
102,101,99,98 80,77,76,74,73,71-68
A0-A7
D0-D15
8 16
1
2
3
1
4
(Page
20) 5
37
04
X702
22.5792MHz
45 43
ATRAC3 ENCODER/DECODER
IC703
FS512F EXTAL
65 15
CLOCK DODT
33
GENERATOR
LRCK LRCK AUDIO
51 38
INTERFACE
BCK
XBCK
52 36
ACLK ACLK
58 25
ACDO ACDI
62 28
ATRAC
XABS XABS
61 29 DATA
ACDI ACDO
INTERFACE
59 31
XARQ XARQ
64 32
MICRO
COMPUTER
INTERFACE
6 8 9 11 13 20 23 24
6 163 160 148 88 31 32 28
SYSTEM CONTROL
IC701(2/3)
– 21 –
X706
32.768kHz
CLOCK
GENERATOR
&
RESET
CIRCUIT
DATA
RAM
DSP CORE
&
ROM
PROGRAM
ROM
D/A CONVERTOR PROCESSOR
IC301
XTI CLOCK
19 1
MANAGER
BCKIN
6
SERIAL 8-TIMES
DIN
5
INPUT OVER •
LRCIN
INTERFACE SAMPLING
4
DIGITAL
FILTER
MODE
(MULTI
CONTROL
FUNCTION)
18 17 16
72 144 145 147
REALTIME CLOCK
IC706
FREQUENCY
XIN
2
OSCILLATION DIVISION,
XOUT
CIRCUIT TIMING
3
PRODUCTION
INT
SIO
REGISTER
SERIAL
XSCK
INTERFACE
CS
XINT
1
COMPARATOR
HEADPHONE AMP
IC302
VREF
BSTNF1
ADD
BST
OUTA
VOUTL
INA
MULTI-LEVEL CR LPF 12 22
PWA
VOUTR
INB
MODULATOR AMP
9 21 OUTB
PWB
BSTNF2
RESET
MTSW MT
17
SW
BEEPOUTA
15
BSTSW
BST BEEPOUTB
16
SW
BEEPIN
BEEP
80 84 149
– 22 –
7
6
5
VREF
12
LPF1
11
10
J303
LPF2
9
i
2
4
8
24
23
BB1/2
SWITCH
Q301
15
BEEP
SWITCH
Q304
85 162 17 18 19
• SIGNAL PATH
: DIGITAL
: ANALOG