Schematic Diagram (Main Section) - Sony NW-E3 Service Manual

Ver 1.1 2000.07
4-3. SCHEMATIC DIAGRAM – MAIN SECTION –
– 15 – – 16 –
z IC Block Diagram (MAIN SECTION)
IC810 M66290FP
VCC 1
GND 2
D – 3
D+ 4
VBUS 5
TR_ON 6
TEST1 7
XTRST 8
TCK 9
TMS 10
TDI 11
TDO
12
Note:
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in Ω and
specified.
• : B+ Line.
• Power voltage is dc 1.5 V and fed with regulated dc power
supply from battery terminal.
• Voltages and waveforms are dc with respect to ground in
playback mode.
no mark : PLAY
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
• Signal path.
J : DIGITAL
* Replacement of IC710 used in the set requires a spe-
cial tool.
• The voltage and waveform of CSP (chip size package) can-
not be measured, because its lead layout is different form
that of conventional IC.
– 17 –
NW-E3
48 47 46 45 44 43 42 41 40 39 38 37
36 GND
35 VCC
D11
USB DEVICE 34 D11
D10
TRANSCEIVER CONTROL 33 D10
SERIAL
D9
UNIT
INTERFACE 32 D9
USB
CPU D8
ENGINE
PERIPHERAL 31 D8
REGISTER
D7
CIRCUIT
END POINT 30 D7
D6
BUFFER 29 D6
CLOCK
D5
(3k BYTE FIFO)
CONTROL 28 D5
D4
(OSCILLATOR/
27 D4
PLL) D3
26 D3
D2
25 D2
13 14 15 16 17 18 19 20 21 22 23 24
1 / W or less unless otherwise
4
– 18 –