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6.6
SYNC RPOCESSOR
H-sync & V-sync or H+V input to U1(u-P), then u-P output the H-out & V-out to
U401(TDA9111).
6.7
HOR. PROCESSOR & VERT. PRE-AMP
Fig. 3 is the block diagram of IC TDA9111.
6.7.1 Block Diagram
6.7.2 Hor. processor
The H-out that come from u-P will input to the pin 15 of U401,it will be compared
with the oscillator sawtooth voltage by the PLL1(pin 26) phase detector, After that, it will be
compared again with the flyback pulse (pin 1) by the PLL2. The PLL2 detector thus compensates for
the delay in the external horizontal deflection circuit by adjusting the phase of the HDRV(pin 7)
output pulse.
6.7.3 Vert. Pre-amp
Vertical oscillator will be trigged by V-out (pin 14) .It is available to get sawtooth waveform in pin 24.
V-center, V-amp and V-linearity can be adjusted in pin 17, 18 and 19. The vertical output driver is
come from pin 12 and 13.
28
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