Sanyo FISHER DVD-1500 Service Manual page 37

MPEG P.W.BOARD OPERATIONAL
(Check wave form)
3 DRAM(IC117) - MICON(IC116) communication
4 Each RESET signal and Timing
DRAM ACCESS signals different from those shown below (constantly
LOW or HIGH, for instance) are unacceptable.
The respective ICs are reset at the timing shown above. No or
incomplete resetting makes the relevant IC inactive or unstable in
operation.
In the case of a DAC, for exmaple, distorted or noisy sound will
result. With a video encoder, unnatural colors or unstable
synchronizatin will result.
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