DEC VT220 Technical Manual page 102

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6.2.4.2
Line
Buffer -- The line buffer circuit is used to store
character
address
and
attribute values during DMA transactions,
and to process those character address and attribute values out to
the
character
output
(character
address
data)
and
attribute
(attribute data) circuits.
The
line
buffer
circuit (Figure 6-14) consists of the following
components.
Line
buffer
address counter -- is clocked by LBA eLKS L
to generate a sequential address value to address buffer.
Address
buffer
loads new address value on each T5 L
time
to
provide sequentially incrementing address input
to the line buffer RAM.
FROM
{:::~~:A
H
TIMING
GEN
_T_5L
--,
LBF WR L
FROM
LBF DISABLE H
CPU LOGIC
CS WE OE
f_B_NK ..... S_1
- H - - - - - r - t - - - l
A10
FROM
~
BNKSO H
QUART l - ' - - - - - - - - + - + - - " " ' ! A 9 LINE
I
r
~~:"
ruN;BuFm~
I
ADDRESSj
,
I
COUNTER
~~~~
I
,
r
LBA CLR H
:~~~ss~
MUX
l
LBA CLK L
DATA
INPUT
BUFFERS
FROM
8051 CPU
OR
SCREEN RAM
FROM
ATIRIBUTE
RAM
TO
ATIRIBUTE
CIRCUITS
TO
CHAR
GEN
Figure 6-14
Line Buffer Block Diagram
6-18

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