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SCHEMATIC DIAGRAM - 2 (MAIN C.B -2/5)
Q Q
3 7 6 3 1 5 1 5 0
MAIN C.B 2/5 (SERVO, DSP SECTION)
T E
L
1 3 9 4 2 2 9 6 5 1 3
TP101
TP109
w w w
,
,
,
,
TP136
TP137
TP138
TP139
TP140
TP142
x
a o
y
.
i
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8
TP200
D-RAM I/F
DVD Decoder
A/D
RF I/F
EFM PLL
SLC
Servo
CIRC Decoder
D/A
Q
Q
3
7
6
3
CPU I/F
TP132
TP131
TP130
TP129
TP155
TP400
TP154
TP401
TP153
TP152
TP151
TP179
TP178
TP185
TP184
TP175
TP174
TP173
u 1 6 3
TP402
.
-49-
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9
2
4
9
8
TP218
JV
TP217
CLV/CAV
Frame sysc Protect
Combine Frame sync
EFM Detector
Sub Code
I/F
Audio
Out
CD-ROM Decoder
AV Decoder
I/F
1
5
1
5
0
8
9
2
4
Clock Gen.
Sys PLL
VCC
NC
GND
TP405
TP404
m
c o
TP403
,
2
9
9
,
TP212
TP208
TP213
TP211
TP210
TP209
9
8
2
9
9
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